Liu Marker Email and Phone Number

2011.10~ HiSILICON, Beijing, Senior engineer, Architecturer Learn A9 RTL code and give out the architecture of A9; Learn A15 RTL code；Do the profiling for the architecture design for the new CPU, which will use ARM’s instruction set;Provide the new idea for the new CPU architecture;

2008.8~2011.10 CTO/chief architecture, SICMICROLead the R&D for the HD SOC chip, which will be used for the STB. HD SOC has been taped out on Apirl, 2010. It can work successfully. Manage R&D team; Responsible for the roadmap, technical solution for IC, driver, application; Responsible for the IC architecture, including bus interconnect, memory bandwidth, performance estimation; Responsible for the architecture of the video core and integrating video core into the IC; Responsible for display module (including video scale, graphics process, OSD, TV encoder) design and verification; Support the IC floorplan; Support the IC backend-design; Support the IC post-simulation;2005.12~2008.8 Program manager, Senior Architecture, ThomsonLead the “Beetle” Project. The “Beetle” chip can support H.264 decoding up to 1920*1088i (Level4.1@MP). This chip had been tape out in UMC on July.15, 2006 (0.13mm), which die size is 5*5 square mm. Manage the project team;Build up the architecture;Code some of the modules, which will provide the data for the computation module;Support the floorplan;Support the back-end design;Support the timing constaints for the IC; Support the IC post-simulation;