Luciana C. Email & Phone Number

Work on designing digital Intellectual Properties (IPs) since 2002.Expertise in requirements capture, documentation, architecture design, and Verilog RTL design.Experience in area and timing optimizations, syntheses, checks using quality assurance tools, script languages, version control systems.10+ years' experience designing timer and PWM signals generators.4+ years' experience in CPU designing (RISC-V core, Zero-riscy core, and LEON3 processor).3+ years' experience in designing of debug modules and JTAG debug transport module. Experience in VHDL RTL design, programming languages C and Assembly.Good knowledge of cryptography and implementation of cryptographic algorithms (hardware and software).Good knowledge of initial verification before releasing digital IP to verification team.Master's Degree in Computer Science, Computer Engineer, and Data Processing Technician.Fluent English.International experience in digital IP design, and frequent interaction with global multidisciplinary teams.