Soc Logic Design Engineer
Current
Nov 2024 - Present
AeroLeads people directory · profile
Luis Castillo, M.S. Email & Phone Number
Software Development Engineer | Expertise in SoC Design, IP Integration & Validation | Bilingual | Air Force Veteran
at
Intel Corporation
1 work email found
@intel.com
4 phones found area 805
LinkedIn matched
✓ Verified July 2026
4 data sources
Profile completeness 86%
Current company
Role
Software Development Engineer | Expertise in SoC Design, IP Integration & Validation | Bilingual | Air Force Veteran
Location
Folsom, California, United States
Company size
Who is Luis Castillo, M.S.? Overview
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Quick answer
Luis Castillo, M.S. is listed as Software Development Engineer | Expertise in SoC Design, IP Integration & Validation | Bilingual | Air Force Veteran at Intel Corporation, a with 10 employees, based in Folsom, California, United States. AeroLeads shows a work email signal at intel.com, phone signal with area code 805, and a matched LinkedIn profile for Luis Castillo, M.S..
Luis Castillo, M.S. previously worked as SoC Logic Design Engineer at Intel Corporation and System-on-Chip Design Integration Engineer at Intel Corporation. Luis Castillo, M.S. holds Master’S Degree, Software Engineering from California State University, Fullerton.
Company email context
Email format at Intel Corporation
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*@intel.com
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AeroLeads found 1 current-domain work email signal for Luis Castillo, M.S.. Compare company email patterns before reaching out.
Profile bio
About Luis Castillo, M.S.
Driven by a commitment to innovation and efficiency, I am a Software Development Engineer with extensive experience in IP design integration, SoC/system-level validation, and software testing. Holding a Master’s in Software Engineering, I have a proven record of delivering high-quality, reliable solutions that enhance product performance and optimize development processes.At Intel, I currently integrate and validate complex IP blocks into SoC designs, ensuring robust communication between components and the system. My recent projects have included full-scale regression validation to confirm SoC functionality, resulting in a product launch with zero critical issues. Previously, as a System Validation Engineer, I led post-silicon validation efforts for PCIe features on high-profile Intel platforms, collaborating cross-functionally to solve issues rapidly and improve system stability.At Western Digital, I spearheaded initiatives to streamline firmware build and release processes, introducing automation to increase speed and reduce errors by 50%. My leadership in developing testing methodologies and enhancing validation protocols helped secure critical revenue-driving partnerships, including a new business relationship with Cisco.What I bring to the table:Streamlined SoC Integration & Testing: Proven ability to integrate IP blocks effectively and validate performance, minimizing downtime and maximizing system reliability.Innovative Process Optimization: Track record of building automation tools that reduce manual workloads and error rates, supporting faster, more reliable releases.Technical Leadership & Mentorship: Experienced in training and mentoring engineers, fostering a collaborative culture that aligns with organizational goals and encourages growth.As a bilingual (English/Spanish) Air Force veteran, I am committed to applying a disciplined, proactive approach to every challenge. My goal is to connect with like-minded professionals and drive advancements in software engineering, SoC development, and embedded systems. If you're interested in discussing engineering innovation, let's connect!
Current workplace
Luis Castillo, M.S.'s current company
Company context helps verify the profile and gives searchers a useful next step.
Intel Corporation
10 roles
Luis Castillo, M.S. work experience
A career timeline built from the work history available for this profile.
System-On-Chip Design Integration Engineer
Responsible for the integration of IP in SoC. From configuration of memory, interconnection of power and clock domains, and configuration of interfaces to the elaboration of simulation models and execution of regression validation.
Mar 2022 - Nov 2024
System Validation Engineer
Responsible for PCIe debug in post-Si validation at SoC and system level.Cross-site collaboration with Design/Architecture/BIOS and other post-Si teams to understand technicalfeatures, leverage Best Known Methods, and debug issues.Content development contributor for PCIe feature enabling and test execution during silicon validation.
Feb 2017 - Mar 2022
Senior Software Engineer
• Implement system changes to improve efficiency on the firmware release process• Add capabilities to build firmware for new products and back-end packages• Enhance automated build request rules and quality checks upstream
Jun 2015 - Jan 2017
Senior Software Development Engineer In Test
• Support and maintenance of pre-release validation process to preserve backward compatibility and provide developers with a sandbox to test and validate software on different system setups• Accountable for environment validation lab which tests and validates multiple system components (e.g. drivers, kernel changes, new hardware) prior to their introduction into main testing lab• Lead team of six people in test environment validation, tools development, and test automation• Plan future projects and goals, prioritize and delegate tasks to software development team
Jul 2013 - Jun 2015
Software Development Engineer In Test
• Develop innovative test methodologies for thorough and reliable validation of firmware prior to production release• Gather test requirements, designing and implementing test cases in System, Regression, and Acceptance testing before firmware is considered as production candidate
Jul 2011 - Jul 2013
Workshop Facilitator/Tutor
• Coached students on problem solving strategies• Helped and guided students with homework questions• Prepared worksheets with example problems to clarify key concepts
Feb 2008 - Jul 2009
Maintenance Operations Center Controller
• Managed and coordinated mission schedules by allocating resources and manpower• Briefed Combat Commanders on systems status and products from previous missions• Gathered and tracked information on maintenance performed to mission equipment
Aug 2005 - Feb 2007
Electrical Power Production Journeyman
• Operated and maintained emergency electrical power generators, power distribution units, and uninterruptible power supplies• Coordinated and performed critical maintenance during contingency operations, key to unit’s outstanding 99.8% readiness rate
Feb 2003 - Aug 2005
Technical Support Specialist
Ups Teleservices
Provided excellent customer service and technical support via phone to users of UPS software applications, UPS website and UPS freight shipping applications. Assisted customers in resolving issues related to the function of the software, including installation, communication, printing, and database issues. Multi-tasked with a variety of programs to log calls, troubleshoot issues, and research questions.Provided support via phone and remote access for The UPS Store franchisees across the country.
Nov 2000 - Jan 2003
Team & coworkers
Colleagues at Intel Corporation
Other employees you can reach at intel.com. View company contacts for 10 employees →
AB
Adam Birr
Colleague at Intel CorporationChandler, Arizona, United States
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HZ
Hongxin Zhang
Colleague at Intel CorporationSanta Clara, California, United States
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MP
M Perez-Paz
Colleague at Intel CorporationHillsboro, Oregon, United States
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EB
Eric Bustillo
Colleague at Intel CorporationHillsboro, Oregon, United States
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SP
Shubham Pandey
Colleague at Intel CorporationBhopal, Madhya Pradesh, India
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SS
Surbhi Shapara
Colleague at Intel CorporationJunagadh, Gujarat, India
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D(
Dongdong (Don) Chen
Colleague at Intel CorporationSan Jose, California, United States
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TS
Tai Shawn Burt
Colleague at Intel CorporationLos Angeles Metropolitan Area, United States
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SV
Sale Venkatesh
Colleague at Intel CorporationKurnool, Andhra Pradesh, India
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YT
Yusuke Tanaka
Colleague at Intel CorporationTokyo, Japan
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Adam Birr
Colleague at Intel CorporationChandler, Arizona, United States
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HZ
Hongxin Zhang
Colleague at Intel CorporationSanta Clara, California, United States
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MP
M Perez-Paz
Colleague at Intel CorporationHillsboro, Oregon, United States
View →
EB
Eric Bustillo
Colleague at Intel CorporationHillsboro, Oregon, United States
View →
SP
Shubham Pandey
Colleague at Intel CorporationBhopal, Madhya Pradesh, India
View →
SS
Surbhi Shapara
Colleague at Intel CorporationJunagadh, Gujarat, India
View →
D(
Dongdong (Don) Chen
Colleague at Intel CorporationSan Jose, California, United States
View →
TS
Tai Shawn Burt
Colleague at Intel CorporationLos Angeles Metropolitan Area, United States
View →
SV
Sale Venkatesh
Colleague at Intel CorporationKurnool, Andhra Pradesh, India
View →
YT
Yusuke Tanaka
Colleague at Intel CorporationTokyo, Japan
View →
4 education records
Luis Castillo, M.S. education
Master’S Degree, Software Engineering
California State University, Fullerton
Bachelor'S Degree, Computer Engineering
California Polytechnic State University-San Luis Obispo
Associate'S Degree, Engineering
Allan Hancock College
Associate'S Degree, Mathematics: Physics Emphasis
Allan Hancock College
FAQ
Frequently asked questions about Luis Castillo, M.S.
Quick answers generated from the profile data available on this page.
What company does Luis Castillo, M.S. work for?
Luis Castillo, M.S. works for Intel Corporation.
What is Luis Castillo, M.S.'s role at Intel Corporation?
Luis Castillo, M.S. is listed as Software Development Engineer | Expertise in SoC Design, IP Integration & Validation | Bilingual | Air Force Veteran at Intel Corporation.
What is Luis Castillo, M.S.'s email address?
AeroLeads has found 1 work email signal at @intel.com for Luis Castillo, M.S. at Intel Corporation.
What is Luis Castillo, M.S.'s phone number?
AeroLeads has found 4 phone signal(s) with area code 805 for Luis Castillo, M.S. at Intel Corporation.
Where is Luis Castillo, M.S. based?
Luis Castillo, M.S. is based in Folsom, California, United States while working with Intel Corporation.
What companies has Luis Castillo, M.S. worked for?
Luis Castillo, M.S. has worked for Intel Corporation, Wd, A Western Digital Company, Allan Hancock College, United States Air Force, and Ups Teleservices.
Who are Luis Castillo, M.S.'s colleagues at Intel Corporation?
Luis Castillo, M.S.'s colleagues at Intel Corporation include Adam Birr, Hongxin Zhang, M Perez-Paz, Eric Bustillo, and Shubham Pandey.
How can I contact Luis Castillo, M.S.?
You can use AeroLeads to view verified contact signals for Luis Castillo, M.S. at Intel Corporation, including work email, phone, and LinkedIn data when available.
What schools did Luis Castillo, M.S. attend?
Luis Castillo, M.S. holds Master’S Degree, Software Engineering from California State University, Fullerton.
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