As a highly motivated person who is driven to do the things that one is passionate about in engineering, I am very much interested in working on cutting-edge technologies in the field of Digital Very Large-scale Integration and Computer Architecture. I have worked on projects that gave me exposure to a lot of current trending topics in the field of engineering.Currently, I am a graduate Software Engineer at Intel. I am a part of the Verification Methodology Team and one of my primary roles is to accelerate the process of migration of various IPs from OVM to UVM. I have put significant efforts into enhancing the Intel-proprietary SystemVerilog collateral methodology for bridging gaps between OVM and UVM. My work involves developing scripts and creating test cases and scenarios for the features added in the testbench. I have also collected functional coverage for UVM based Register Abstraction Layer. I am currently working on optimizing the UVM/OVM based RAL Testbench that will speed up the verification of several IPs and SOCs within Intel.I did my previous internship in Samsung Semiconductor India Research during my under graduation. I worked in the Verification team, where I created Perl scripts to automate System Verilog assertion and coverage files.