M. Amanullah Khan Email & Phone Number

Chicago, IL, US

Niles, Illinois, United States

• Wireless FPGA Systems
• Designed, implemented, and tested RTL (VHDL) for an automatic gain controller (AGC) that interfaced with a RF-ADC (AD6676) for a multi-channel receiver.
• Wrote testbenches and verification code in Python using pytest, cocotb, and ModelSim for hardware simulations.
• Utilized signal generators and Integrated Logic Analyzers (ILA) to test/debug FPGA image on physical units.

Santa Clara, California, United States

• Clock and Timing Solutions
• Operated Teradyne UltraFlex and various other Automatic Test Equipment (ATE) to conduct comprehensive testing of semiconductor devices.
• Adapted and optimized Visual Basic code for UltraFlex to run on UltraFlex Plus platform to reduce test time.
• Designed and implemented specialized tests aimed at identifying customer-specific failures, subsequently validating the tests through analysis of customer returned units.

Santa Clara, California, United States

• Clock and Timing Solutions
• Developed Python and C++ code to facilitate the automation of characterization data analysis, eliminating the need for manual data manipulation.
• Created GUI to replace command line interface for existing apps via Python’s Tkinter library.
• Analyzed characterization data to determine production test limits, predict yield data, and identify failures.

San Francisco, California, United States

• Executed computer science lessons over Zoom for students ages 8-18, adapting to student needs and interests by assessing their learning level and personally tailoring a teaching style.
• Communicated with parents on a regular basis, providing updates on learning progression.
• Maintained records for each student over the course of a year, covering multiple courses and skill levels from basic Python to introductory data structures and algorithms.

Master Of Science - Ms, Electrical And Computer Engineering

Bachelor Of Science - Bs, Electrical Engineering With Honors, Minor In Computer Science, 3.57/4.0

Senior Thesis: An Efficient and Scalable Method for Authenticating Microchips Using Physically Unclonable Functions and Blockchain