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Mina Abdelmalek Email & Phone Number

Senior Technologist at pSemi, A Murata Company
Location: San Francisco Bay Area, United States 10 work roles 4 schools
1 work email found @rpxcorp.com LinkedIn matched
✓ Verified August 2026 4 data sources Profile completeness 100%

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Work email m****@rpxcorp.com
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Current company
Role
Senior Technologist
Location
San Francisco Bay Area, United States
Company size

Who is Mina Abdelmalek? Overview

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Quick answer

Mina Abdelmalek is listed as Senior Technologist at pSemi, A Murata Company, a with 168 employees, based in San Francisco Bay Area, United States. AeroLeads shows a work email signal at rpxcorp.com and a matched LinkedIn profile for Mina Abdelmalek.

Mina Abdelmalek previously worked as Manager, Patent Analysis at Rpx Corporation and Semiconductor Process Analyst/IP Consultant at Techinsights. Mina Abdelmalek holds Doctor Of Philosophy (Ph.D.), Electronics/Nanotechnology Engineering from University Of Waterloo.

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Email format at pSemi, A Murata Company

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{first_initial}{last}@rpxcorp.com
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Profile bio

About Mina Abdelmalek

Mina Abdelmalek is a Technology Analyst, Registered Patent Agent, and Reverse Engineering Expert.

Listed skills include Characterization, Nanotechnology, Matlab, Semiconductors, and 45 others.

Current workplace

Mina Abdelmalek's current company

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pSemi, A Murata Company
Psemi, A Murata Company
Senior Technologist
California, United States
Website
Employees
168
AeroLeads page
10 roles

Mina Abdelmalek work experience

A career timeline built from the work history available for this profile.

Senior Technologist

Current

San Diego, Ca, Us

· Working with engineering and product development teams in seeding, harvesting, and developing inventions and invention disclosures.· Working as part of IP Department strategy team to contribute to strategic projects and internal/external partnerships aimed at developing inventions and patents.· Working as part of IP Department prosecution team to capture high-value patents in alignment with our business strategy.· Performing prior art analysis.· Working as part of and leading IP Department intelligence and competitive analysis team on infringement analysis, including analysis of reverse engineering and/or teardown reports or defining and leading reverse engineering projects, and claim chart building.· Working in alignment with Murata Global IP team members in Japan, Europe, and in the US to support pSemi and Murata business interests worldwide.

Aug 2022 - Present

Manager, Patent Analysis

San Francisco, Ca, Us

• Work closely with different RPX members to define and execute their IP strategy.• Provide patent intelligence and advisory services on quality of IP for varied technology sectors; semiconductors & displays, consumer electronics & PCs, mobile communications & devices, as well as other patent portfolios offered on the open market or asserted in litigations.• Evaluate numerous claim charts and evidence of use on client products.• Discuss and articulate quality of IP assets and IP valuation with well-known tech clients.• Provide in-depth analysis of several large well-known portfolios to support patent risk management and divestment services, including defensive buying and acquisition syndication.• Perform in-depth prior art research to support internally initiated IPRs as well as surfacing references for clients to use.• Conduct regular meetings and lead technical discussions with clients to present fee justification materials and understand product and technology focus areas.• Provide support for technology oriented internal research and presentations at conferences.

Jul 2019 - Aug 2022

Semiconductor Process Analyst/Ip Consultant

Ottawa, On, Ca

• Special Achievement Award (Nov 2018) and High-Five Bonus (Sep 2018).• Project lead and technical analyst of semiconductor device process technology.• Analyze devices on an ongoing basis including, advanced CMOS, CMOS image sensors, OLED Displays, MEMS, emerging non-volatile memory, embedded memory, ferroelectric memory, …• Project lead for transistor characterization of advanced node transistors (7 nm to 90 nm).• Patent portfolio evaluation, strengthening, patent product mapping, and documenting against infringements.• Prepare technical documentations.• Provide in-depth technical support to customers.• Write technical subscription reports for advanced memory, RF devices, IoT devices.• Experience: Advanced CMOS, SOI, 3D NAND, DRAM, eFlash, Ferroelectric memory, Reverse engineering, SEM, TEM, EELS, SIMS, Raman, Patent analysis.

Jan 2018 - Jul 2019

Thin Film Process Engineer

Waterloo, Ontario, Ca

Graduate Research and Teaching Assistant• ECE Distinguished Teaching Assistant Award (Jan 2017).• Waterloo Institute for Nanotechnology NanoFellowship (Award – Sep 2017).• ECE Outstanding Performance Award (Jan 2018)• Experience: Clean room, devices design/fabrication and characterization, semiconductor devices,CMOS, MEMS, III-V, BCDMOS, LCD, PV, NVM, nanowires, rod-coating, screen printing, transferprinting, wearable electronics, 4 point-probe, AFM,

Sep 2016 - Jan 2018

Ret Product Engineer - Opcverify

Wilsonville, Or, Us

• Responsible for Calibre OPCVerify product: define and characterize new product capabilities, support research partnerships, and work closely with product marketing to communicate the value and benefits of new features and capabilities.• Support the evolution of OPCVerify product and drive customer adoption.• Work closely with foundries (Samsung, GlobalFoundries, SMIC, …) to define and support thedevelopment of next generation lithography.• Collaborate continuously with cross-functional teams including software engineering, applicationengineering, quality assurance, product marketing, and customers.• Support product planning, presentations, brochures, white papers & elements of technical collaterals.• Provide in-depth technical support and training to customers.• Outline, manage, and implement cross-functional plans for new product releases.• Attend local and international business meetings, sales kick-off events and technical conferences at multiple locations.• Report to the Calibre RET Modeling and Verification Product Director.• Experience: Photolithography, optical modeling and simulation, semiconductor devices, CMOS, IIIV, 14nm process technology node, 10nm process technology node, foundry experience, multiplepatterning, device evaluation, process and design improvement, software development/testing with shell, TCL scripting languages, knowledge of UNIX/Linux operating systems, and experience with commercial OPC, RET, DFM, LVS, DRC and multiple patterning software.

Sep 2014 - Aug 2016

Oled Process Engineer

Waterloo, Ontario, Ca

Graduate Research and Teaching Assistant• Research Topic: small molecules OLEDs (smOLEDs) efficiency (~60Cd/A) and stability focusing on green phosphorescent OLEDs (PhOLEDs).• Clean rooms: G2N Lab and IQC.• Experience: Fabrication, electrical measurements and characterization, thin-film deposition and characterization, substrate cleaning, different surface treatment of ITO (RIE plasma treatments, wet chlorination and Ar IBAD treatment), glove box, thermal evaporation, organic emitter sublimation, efficiency, stress tesing and electrical stability measurements under nitrogen.Teaching Assistant:• Fall2013: MTE220 “Sensors and Instrumentation” (best TA Award).• Fall2012: NE340L “Microfabrication and Thin-film Technology” thin film deposition by PECVD and PVD (sputtering); photolithography; dry and wet etching; and C-V and I-V analysis of MIS structures (overall evaluation: 5/5).• Spring2012: NE344 “Electronic Circuits and Integration” (overall evaluation: 4.8/5).• Winter2012: ECE331 “Electronic Devices” (overall evaluation: 4.9/5).• Fall2011: MTE220 “Sensors and Instrumentation” (overall evaluation: 4.57/5).• Experience: teaching at 3 different Engineering departments (Nanotechnology, Electrical and Mechatronics Engineering), in addition to a clean room course.

May 2011 - Jun 2014

Process Engineer

Eindhoven, Nl

• Research Topic: MEMOLED research aiming to combine both organic bistable memory devices with highly efficient Organic Light Emitting Devices (OLEDs) for active matrix display purposes.• Clean rooms: Philips Innovation Services, Holst Centre and TNO.• Experience: Fabrication, substrate handling, different surface treatments of gold (e.g. plasma treatment), glove box, solution preparation, wire-bar coating, spin coating, SAM, block copolymers, microcontact printing, thermal evaporation, encapsulation, DEKTAK, AFM, contact angle, 4-point probe and electrical characterization.

Jan 2013 - Oct 2013

Graduate Teaching Assistant

El Sherouk City, Eg

• Courses: Electronics (1), Electromagnetism (2), Antennas and Propagation, Probability and Random Process, Semiconductor Devices, Optical Systems, Measurements and Instrumentation, RF MEMS and Sensors for Wireless Applications and VLSI.• Experience: Electronic Circuit simulators (e.g. OrCAD), Electronic Layout Design, COMSOL Multiphysics and MATLAB.• Additional Responsibilities: Optical systems Lab manager.

Sep 2009 - Apr 2011

Device Modeling Engineer

Wilsonville, Or, Us

• Research Topic: Investigating the performance of the common symmetric multi-gate FETs Model (BSIM-CMG) as a graduation project thesis.• Labs: simulation labs at Mentor graphics, Characterization Labs at Ain shams University.• Experience: Mentor Graphics tools, MATLAB, Electronic Devices Modeling and characterization.

Sep 2008 - Jul 2009
Team & coworkers

Colleagues at pSemi, A Murata Company

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4 education records

Mina Abdelmalek education

Doctor Of Philosophy (Ph.D.), Electronics/Nanotechnology Engineering

University Of Waterloo

Masc, Electronics/Nanotechnology Engineering

University Of Waterloo

Msc, Electronics

Ain Shams University

Bsc(Hons), Electronics And Communication Engineering

Ain Shams University
FAQ

Frequently asked questions about Mina Abdelmalek

Quick answers generated from the profile data available on this page.

What company does Mina Abdelmalek work for?

Mina Abdelmalek works for pSemi, A Murata Company.

What is Mina Abdelmalek's role at pSemi, A Murata Company?

Mina Abdelmalek is listed as Senior Technologist at pSemi, A Murata Company.

What is Mina Abdelmalek's email address?

AeroLeads has found 1 work email signal at @rpxcorp.com for Mina Abdelmalek at pSemi, A Murata Company.

Where is Mina Abdelmalek based?

Mina Abdelmalek is based in San Francisco Bay Area, United States while working with pSemi, A Murata Company.

What companies has Mina Abdelmalek worked for?

Mina Abdelmalek has worked for Psemi, A Murata Company, Rpx Corporation, Techinsights, University Of Waterloo, and Mentor Graphics.

Who are Mina Abdelmalek's colleagues at pSemi, A Murata Company?

Mina Abdelmalek's colleagues at pSemi, A Murata Company include Kumi Watanabe, Anil Kumar, Tem O., Sorin Lazarescu, and Jubaid Abdul Qayyum.

How can I contact Mina Abdelmalek?

You can use AeroLeads to view verified contact signals for Mina Abdelmalek at pSemi, A Murata Company, including work email, phone, and LinkedIn data when available.

What schools did Mina Abdelmalek attend?

Mina Abdelmalek holds Doctor Of Philosophy (Ph.D.), Electronics/Nanotechnology Engineering from University Of Waterloo.

What skills is Mina Abdelmalek known for?

Mina Abdelmalek is listed with skills including Characterization, Nanotechnology, Matlab, Semiconductors, Simulations, Organic Electronics, Physics, and Electronics.

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