I'm an Electronics Engineering undergraduate at Zakir Husain College of Engineering and Technology, AMU, passionate about VLSI design, with hands-on experience in both analog and digital domains. My work is driven by a commitment to innovation and the pursuit of performance optimization in circuit design.Publications :"A 5GHz Gain-Bandwidth Op-Amp in 180nm Technology" at the 4th IEEE International Conference on VLSI Systems, Architecture, Technology, and Applications, highlighting my research contributions in analog circuit design.Experience & Projects : Analog Circuit Design Intern: During my summer internship under mentorship of Dr. GS Javed (Analog Design Manager @ Intel),I designed amplifiers and filters using the Gm/Id methodology, strengthening my expertise in analog IC design.B.Tech. Project: I'm currently working on the design of 2.4 GHz Phase-Locked Loop in CMOS 180nm technology, focusing on enhancing performance and efficiency.CMOS Inverter Design: Completed end-to-end design from schematic to GDSII, utilizing Cadence Virtuoso, with pre- and post-layout simulations to validate the design.Neural Network on FPGA : Designed and implemented a Hand-written digit recognition system using Verilog HDL and Python, integrating software models and FPGA-based hardware realization.Position of Responsibility :As President of the Engineering Design & Implementation Club (EDIC), AMU, I lead workshops, hackathons, and mentorship initiatives, connecting students with real-world circuit design challenges and industry insights.