Pre-Silicon Validation Engineer
CurrentMember of team responsible for development and verification of a high performance networking and communication architecture, also known as Omni-path fabric.
Please complete the CAPTCHA to continue
@intel.com
✓
LinkedIn matched
A concise factual answer block for searchers comparing this professional profile.
Maneet B. is listed as Pre-Silicon Validation Engineer at Intel Corporation, a company with 10 employees, based in Greater Boston, United States, United States. AeroLeads shows a work email signal at intel.com and a matched LinkedIn profile for Maneet B..
Maneet B. previously worked as Verification Design Engineer at Lsi Corporation and Intern Hardware Architect/Graduate Technical Intern at Intel Corporation, Intel Mobile Communications (Imc). Maneet B. holds Master'S, Electrical Engineering from University Of Minnesota.
This section adds company-level context without repeating Maneet B.'s masked contact details.
AeroLeads found 1 current-domain work email signal for Maneet B.. Compare company email patterns before reaching out.
• Masters degree in Electrical Engineering specializing in VLSI and computer architecture• Experienced with System Verilog based OVM verification environment development• Experienced with constrained random based verification, functional coverage and assertions • Hand-on work experience and domain knowledge of VLSI concepts, digital circuits and computer architecture
Listed skills include Verilog, Vhdl, Cadence Virtuoso, Systemverilog, and 23 others.
Company context helps verify the profile and gives searchers a useful next step.
A career timeline built from the work history available for this profile.
Santa Clara, California, US
Member of team responsible for development and verification of a high performance networking and communication architecture, also known as Omni-path fabric.
San Jose, CA, US
· Design and development of a System Verilog based OVM environment for a hard disk controller· Part of design team for verification of read channel servo sub block for various projects· Responsible for verification closure of block/system/chip level functions. Maintaining, tracking and closing design bugs.· Hand-on work experience with constrained random.
Santa Clara, California, US
Bangalore, Karnataka, IN
Other employees you can reach at intel.com. View company contacts for 10 employees →
Aoife Barnicle
Colleague at Intel CorporationIreland, Ireland
View →
AG
Abby Greenberg
Colleague at Intel CorporationPortland, Oregon, United States, United States
View →
PC
Paul Cordeiro
Colleague at Intel CorporationPortland, Oregon Metropolitan Area, United States
View →
SK
Shreesh Kulkarni
Colleague at Intel CorporationBengaluru, Karnataka, India, India
View →
MC
Marie Conte
Colleague at Intel CorporationUnited States, United States
View →
SZ
Shu Zhou
Colleague at Intel CorporationHillsboro, Oregon, United States, United States
View →
IB
Ido Barkai
Colleague at Intel CorporationSouth District, Israel, Israel
View →
JA
Jedidiah Agbenu
Colleague at Intel CorporationAllentown, Pennsylvania, United States, United States
View →
LA
Luciane Apolinario
Colleague at Intel CorporationHillsboro, Oregon, United States, United States
View →
TH
Trevor Harcrow
Colleague at Intel CorporationTempe, Arizona, United States, United States
View →
Quick answers generated from the profile data available on this page.
Maneet B. works for Intel Corporation.
Maneet B. is listed as Pre-Silicon Validation Engineer at Intel Corporation.
AeroLeads has found 1 work email signal at @intel.com for Maneet B. at Intel Corporation.
Maneet B. is based in Greater Boston, United States, United States while working with Intel Corporation.
Maneet B. has worked for Intel Corporation, Lsi Corporation, Intel Corporation, Intel Mobile Communications (Imc), and Wipro Technologies.
Maneet B.'s colleagues at Intel Corporation include Aoife Barnicle, Abby Greenberg, Paul Cordeiro, Shreesh Kulkarni, and Marie Conte.
You can use AeroLeads to view verified contact signals for Maneet B. at Intel Corporation, including work email, phone, and LinkedIn data when available.
Maneet B. holds Master'S, Electrical Engineering from University Of Minnesota.
Maneet B. is listed with skills including Verilog, Vhdl, Cadence Virtuoso, Systemverilog, Algorithms, Modelsim, C++, and Xilinx Ise.
Search by job title, company, industry, location, and seniority. Export verified B2B contact data when you need it.
Start free trial Search contacts