Maniyam Siddharth Email & Phone Number

Passionate ASIC Engineer who is willing to work in the field of DFT leading to grow professionally as well as personally and to contribute to the organization by using my knowledge, abilities and skills. Knowledge on concepts like BSCAN, ATPG and MBIST and few of the SoC level slow speed protocols like SD/SDIO3.0 and eMMC.>> Hands on experience on tools like Synopsys TestMAX for ATPG, TestMAX-SMS for SMS logic insertion on RTL and si_debug tool for MBIST pattern generation.>>Generated patterns with compression and compression bypassed using TMAX tool for the full_chip design and simulated those with timing (SDF backannotation). Debugging of the failed patterns by analyzing scanreport and the dump.>> Fault coverage improvement techniques>> MBIST pattern generation for ROM and all the memories in the chip>> JTAG protocol (IEEE 1149.1)>> AMBA protocols

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  Verification Engineer (Dft)

  Axiado Corporation

  Mar 2022 - Present - Hyderabad, Telangana, India

  >> Worked on SCAN patterns generation for the full chip using TMAX tool of synopsys. Simulate the patterns with timing (SDF backannotation) and debug the pattern which fail.>> Coverage improvement techniques.>> Worked with the tester team (Tessolve) at the post silicon phase and participated in the debug session.>> MBIST pattern generation for ROM and RAM in the full chip. Hands on experience with the si_debug tool.