🚀 Embarked on an exhilarating journey to revolutionize graph algorithm performance with GPU-CPU fusion, leading to a staggering 100X speedup!🔍 As a developer, I tackled the challenge of slow graph analytics and explored cutting-edge technologies like cuGraph, TigerGraph, User-Defined Functions (UDFs), and NVIDIA A100 GPUs.💡 Embracing cuGraph's GPU acceleration, we harnessed the parallel processing might of NVIDIA A100 GPUs, paving the way for lightning-fast graph… Show more 🚀 Embarked on an exhilarating journey to revolutionize graph algorithm performance with GPU-CPU fusion, leading to a staggering 100X speedup!🔍 As a developer, I tackled the challenge of slow graph analytics and explored cutting-edge technologies like cuGraph, TigerGraph, User-Defined Functions (UDFs), and NVIDIA A100 GPUs.💡 Embracing cuGraph's GPU acceleration, we harnessed the parallel processing might of NVIDIA A100 GPUs, paving the way for lightning-fast graph computations.🔗 Complementing GPU prowess, TigerGraph's graph database capabilities ensured seamless data flow and optimized queries, enhancing the overall architecture's efficiency.🌟 Introducing UDFs, we unleashed custom C++ functions to bridge the gap between TigerGraph and cuGraph, unlocking new possibilities and extending graph analytics capabilities.📊 From streaming edges and GPU-accelerated computations to obtaining results via Thrift RPC, the data flow between TigerGraph and cuGraph emerged as a powerhouse fusion.🚀 Real-world benchmarks revealed the breakthrough: a remarkable 100X speedup in graph algorithm performance, opening doors to diverse applications from social networks to recommendation systems.🔍 Shared best practices and considerations to optimize graph analytics, empowering fellow developers to embrace this future-oriented approach.🏆 Conquering the realm of graph analytics, this GPU-CPU fusion experience drives innovation and accelerates insights into interconnected data networks. Show less

As a founding engineer at BigZetta Systems, I had the opportunity to work on the query accelerator product, bzQAccel. This product was designed to accelerate Hive-LLAP big data SQL engine using FPGA-based hardware. My primary responsibility was to analyze the source code of Big Data technologies like Hive, Hadoop, Tez, and LLAP to figure out the performance bottlenecks in computation. By doing so, we were able to identify areas that could be improved by using FPGA-based hardware.During… Show more As a founding engineer at BigZetta Systems, I had the opportunity to work on the query accelerator product, bzQAccel. This product was designed to accelerate Hive-LLAP big data SQL engine using FPGA-based hardware. My primary responsibility was to analyze the source code of Big Data technologies like Hive, Hadoop, Tez, and LLAP to figure out the performance bottlenecks in computation. By doing so, we were able to identify areas that could be improved by using FPGA-based hardware.During my time at BigZetta Systems, I played a key role in creating a new data format, called bzpcv, which is language agnostic and can be easily transferred between JAVA, C++, and FPGA. We also developed SIMD vectored operators in C++ that offloaded computation from JVM LLAP operators to speed up the query execution. Additionally, I created a cache for frequently accessed tables in bzpcv format to further optimize the performance of the SQL engine.One of the most challenging aspects of my role was to offload mission-critical operators like compression/decompression join filter to FPGA. However, we were able to achieve significant performance gains by using FPGA-based hardware. Using FPGA/faster C++ operators, we were able to make tpch up to 5x faster.Overall, my experience at BigZetta Systems was extremely rewarding as it provided me with the opportunity to work with cutting-edge technologies and contribute to the development of innovative solutions to Big Data problems. Show less

As a Senior Big Data Engineer at BigZetta Systems, I have been responsible for providing expertise in BigData Hive, Hadoop, Tez, and LLAP source code analysis to identify performance bottlenecks for computation. By utilising my knowledge and skills in FPGA-based hardware acceleration, I have been able to accelerate Hadoop core using FPGA sort kernel.Key Responsibilities:*Analyzing source code of BigData Hive, Hadoop, Tez, and LLAP to identify performance bottlenecks for… Show more As a Senior Big Data Engineer at BigZetta Systems, I have been responsible for providing expertise in BigData Hive, Hadoop, Tez, and LLAP source code analysis to identify performance bottlenecks for computation. By utilising my knowledge and skills in FPGA-based hardware acceleration, I have been able to accelerate Hadoop core using FPGA sort kernel.Key Responsibilities:*Analyzing source code of BigData Hive, Hadoop, Tez, and LLAP to identify performance bottlenecks for computation.*Proposing and implementing solutions to address performance issues by utilizing FPGA-based hardware acceleration.*Integrating and optimizing FPGA-based hardware modules to accelerate Hadoop core using FPGA sort kernel.*Working closely with cross-functional teams to ensure the timely delivery of high-quality solutions.Key Achievements:*Successfully identified performance bottlenecks in BigData Hive, Hadoop, Tez, and LLAP source code and proposed FPGA-based hardware acceleration solutions to address them.*Integrated FPGA-based hardware modules to accelerate Hadoop core using FPGA sort kernel, resulting in a significant increase in performance.*Collaborated with cross-functional teams to ensure the timely delivery of high-quality solutionsIf you're looking for a skilled and experienced Senior Big Data Engineer who can accelerate your Hadoop core using FPGA-based hardware acceleration, please feel free to reach out to me Show less

Holds phenomenal experience in developing low latency-high throughput, distributed micro-services for streaming data, which guarantee high availability, fault tolerance and scalability on-demand. The multi-tier micro-services can handle high concurrency and enormous flow of data, processing ~132 Billion messages daily, while optimally doing all the heavy-lifting required to stream real-time stock market pricing data.These services are capable of streaming 44 terabytes of data in 4… Show more Holds phenomenal experience in developing low latency-high throughput, distributed micro-services for streaming data, which guarantee high availability, fault tolerance and scalability on-demand. The multi-tier micro-services can handle high concurrency and enormous flow of data, processing ~132 Billion messages daily, while optimally doing all the heavy-lifting required to stream real-time stock market pricing data.These services are capable of streaming 44 terabytes of data in 4 hours, with an optimal average CPU usage of just 15%, on a dedicated 10 GB/sec network. Putting it in simple words, Netflix streams about 1 GB of data per hour to stream a video. So, it's equivalent to streaming ~44,000 videos concurrently. Removing the bandwidth barrier and extrapolating the figures, the services will be able to stream ~290,400 videos concurrently i.e. 290 terabytes of data in just 4 hours. Show less

NEC HYDRAstor is a disk-based grid storage system with data deduplication for backups and archiving , developed by NEC Corporation . A HYDRAstor storage system can be composed of multiple nodes, starting from one up to 100+ nodes. Each node contains...

As a Software Defined Radio Engineer , I am responsible for developing and maintaining software defined radio (SDR) systems. My key responsibilities include:* Designing, developing, and testing SDR systems using various tools and technologies such as GNU Radio, USRP, and HackRF.*Developing and implementing automatic repeat request (ARQ) protocols to improve the reliability of wireless communication systems.*Developing and implementing the Mixed Excitation Linear Predictive… Show more As a Software Defined Radio Engineer , I am responsible for developing and maintaining software defined radio (SDR) systems. My key responsibilities include:* Designing, developing, and testing SDR systems using various tools and technologies such as GNU Radio, USRP, and HackRF.*Developing and implementing automatic repeat request (ARQ) protocols to improve the reliability of wireless communication systems.*Developing and implementing the Mixed Excitation Linear Predictive (MELP) algorithm for voice coding in SDR systems.*Writing efficient and maintainable code in C and C++ for embedded systems.*Working on various embedded systems, including microcontrollers and digital signal processors (DSPs), to develop SDR applications.*Debugging and troubleshooting software and hardware issues in SDR systems.I have successfully developed and deployed multiple SDR systems for various applications. I have also collaborated with cross-functional teams to design and implement advanced wireless communication protocols for military and commercial applications. My strong understanding of embedded systems and programming skills have allowed me to create reliable and efficient SDR systems that meet or exceed customer requirements. Show less