Marc Ellis work email
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Marc Ellis personal email
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I am an electronics test engineer who is passionate about process test. I work with R&D and Manufacturing Engineers to develop and follow Design for Testability (DFT) guidelines on modules. I work with Manufacturing Engineers, Test Technicians and Test Operators to test modules and debug failing units. I've trained coworkers in Germany, China, Mexico, Malaysia, Thailand, and the United States both in person and remotely in In-Circuit Test (ICT), Boundary Scan Test (BST), and DFT programming and philosophies. I've worked with, trained, and helped test technicians both in person and remotely to debug failing modules and teaching debug methodologies at the same time. I've been heavily involved in prototype, New Product Introduction (NPI), Sustaining, and Return and Repair (R&R) steps in the life cycle of printed circuit board assemblies (PCBAs). I started out learning ICT from former Genrad test engineers who instilled the importance of test stability and test coverage when developing test solutions for modules which I still use and pass on to colleagues to this day. I have test disciplines which include ICT using Genrad/Teradyne and Hewlett-Packard/Agilent/Keysight ICT testers, BST using ASSET InterTech Scanworks and Goepel Cascon Boundary Scan software, and Flying Probe Test using Takaya Flying Probe testers. I've developed Durability and Reliability test solutions with LabVIEW for Automotive Switches. Knowing these philosophies of the test process also allow me to be an integral part of DFT for modules that need to be tested. Delivering test solutions to customers, to factory floors I am working at, or to contract manufacturers gives me the experience with production to develop high quality test solutions from both a hardware and a software sense.Expertise:| Prototype | New Product Development | Production | R&R | Boundary Scan Test | Flying Probe Test | In-Circuit Test | DFT Analysis | Team Leadership | Training | Remote Development and Debugging | Mentoring | Scripting | LabVIEW |
Northrop Grumman
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Sr Principal Electronics Engineer - Circuit Card AssemblyNorthrop Grumman Mar 2023 - Present
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Engineering Manager 1Schweitzer Engineering Laboratories (Sel) Oct 2022 - Mar 2023Pullman, Wa, Us• Manage Test Engineers, Maintenance Technicians, and Mechanical Engineers -
Lead Test EngineerSchweitzer Engineering Laboratories (Sel) Sep 2021 - Oct 2022Pullman, Wa, Us• Develop and debug test scripts for Test Point Reset products• Develop and debug test scripts for Current and Voltage Reset products• Develop modernized test solutions for products tested on legacy test stations• Share knowledge with Test Engineering Managers in Pullman, Washington in the best practices developing test solutions in Flying Probe and ICT test platforms -
Staff Test EngineerInfinera Jul 2019 - Mar 2020San Jose, California, Us• Create Boundary Scan (BSCAN) test solutions using Scanworks and Goepel to attempt to test every device on a Unit Under Test (UUT) that BSCAN devices have access to. • Subject Matter Expert for BSCAN and Process Test.• Trained test engineers in Naperville and locations around the world in BSCAN test processes, capabilities, and debug philosophies. • Provided Design for Testability (DFT) analysis on new designs for improved test coverage. -
Senior Lead EngineerInfinera Oct 2018 - Jul 2019San Jose, California, Us -
Senior Lead EngineerCoriant Gmbh & Co. Kg Jan 2014 - Oct 2018Munich, DeCoriant bought by Infinera• Create Boundary Scan (BSCAN) test solutions using Scanworks and Goepel to attempt to test every device on a Unit Under Test (UUT) that BSCAN devices have access to. • Subject Matter Expert for BSCAN and Process Test.• Trained test engineers in Naperville and locations around the world in BSCAN test processes, capabilities, and debug philosophies. • Provided Design for Testability (DFT) analysis on new designs for improved test coverage. -
Senior EngineerTellabs Jul 2001 - Dec 2013Carrollton, Tx, UsTellabs bought by Coriant• Create Boundary Scan (BSCAN) test solutions using Scanworks and Goepel to attempt to test every device on a Unit Under Test (UUT) that BSCAN devices have access to. • Subject Matter Expert for BSCAN and Process Test.• Trained test engineers in Naperville and locations around the world in BSCAN test processes, capabilities, and debug philosophies. • Provided Design for Testability (DFT) analysis on new designs for improved test coverage.• Developed Flying Probe test solutions using Takaya Flying Probe equipment.• Developed In-Circuit Test (ICT) solutions using Genrad\Teradyne and Agilent ICT Testers. -
Test EngineerGlenayre Dec 1999 - Jul 2001• Developed Agilent 3070 ICT and Functional Test (FCT) solutions.• Defined specifications for a million dollar backplane test solution.• Supported manufacturing test and debug.
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Test EngineerMethode Electronics Oct 1996 - Dec 1999Chicago, Illinois, Us• Developed durability test solutions for Automotive Switches using Data Acquisition equipment and Labview software. -
Senior Test EngineerIntrinsic Quality Mar 1988 - Oct 1996Elk Grove Village, Illinois, Us• Developed and installed Genrad\Teradyne and Agilent ICT test solutions for customers in military, automotive, industrial and commercial product markets.• Trained new coworkers in ICT solution development.• Maintained model libraries.
Marc Ellis Education Details
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Devry UniversityElectrical Engineering Technologies/Technicians
Frequently Asked Questions about Marc Ellis
What company does Marc Ellis work for?
Marc Ellis works for Northrop Grumman
What is Marc Ellis's role at the current company?
Marc Ellis's current role is Lead Test Engineer/Engineering Manager I | New Product Development | Boundary Scan | In-Circuit Test | Flying Probe | Design for Testability (DFT) | LabVIEW.
What is Marc Ellis's email address?
Marc Ellis's email address is ma****@****inc.com
What schools did Marc Ellis attend?
Marc Ellis attended Devry University.
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