A leading semiconductor company in the USA, Tessolve is dedicated to pushing the boundaries of innovation. With a commitment to engineering excellence, we deliver cutting-edge solutions across diverse sectors.

ASICSoft provides its clients High Value Engineering Hardware and Embedded Software Consulting / Staffing Services. We support customers development cycle from concept through production for a verity of products and platforms including:• ASICs, Cores, Subsystems, Analog, Mixed Signal, FPGA, PCB• Embedded Software, AI, Automotive, Mobile, Cloud, IoT, Testing/QAASICSoft works directly with Managers ensuring their team's success. Additionally, we work with MSP / VMS / HR programs. We are happy to adopt and support your company with whatever engagement model works for you. We support:• Contractor• Contract to Hire• Fulltime DirectTechnical Focus:• System Level Design - Architectural Modeling & Analysis / Proof of concept• Front End Design - RTL Design, Verification, Synthesis, Constraint Generation for Timing, Low Power • Back End Implementation – Floor planning, Place & Route, Timing, DFT, Layout, Analog Mixed Signal, etc.• PCB Design: High-speed, Low-power, Analog / Digital RF, etc.• Embedded Systems: low-level, firmware, middleware, applications, drivers, boot, diagnostics, kernel, etc.• Applications Software: UI, web, mobile, cloud, middleware, front-end / back-end, etc.• IT: ERP, Software, BI, Analysts, Network/System Administration, Database, Cloud, etc.

Encore Semi provides proven IC design (analog and digital) and embedded software design services.

Responsible at Freescale, TI, ST, AMD, ON Semi, NXP, Maxim, HP to drive and manage tool adoption and proliferation for RTL-GDS resulting in complete vendor consolidations and Freescale and TI. • Managed team of Application engineers, Project Managers and Design Services. Planned and executed numerous successful IC Digital technical campaigns at both Freescale and TI which helped convince both companies to partner with Cadence for complete EDA solution. • Consistent over achiever, 125% of run rate quota last two years.• Key technology wins in ASIC, Wireless, DSP, Networking and Automotive using various IP including PowerPC, ARM and DSP. Technical engagements in the areas of Advanced Node (28nm & 40nm), Low Power, Timing Closure (from 500Mhz–1Ghz, Symmetrically Balanced Clock Trees Synthesis), Big Chip Initiative (hit capacity and throughput metrics at 40nm and 28nm for chips in the 50M-100M instance range). Developed floorplan synthesis features which enabled Die Size Reduction flow.• Managed much of the IC Digital transition including:o Training and support of pilot design teams to resolve closure issues to prevent impacting tapeout scheduleso Prioritize track and communicate issues requiring code change to R&D.o Allocate and Manage services and application engineers supporting pilot projects.

Responsible for Physical Implementation on Chip top and Load Store Unit including Floorplanning, Place and Route, Timing Closure, and verification, Using a combination of IBM internal tools ( BooleDozer, HDP, Cplace, Einstimer, Niagra ) and Cadence tools (SE, Virtuoso) for Physical Design and verification.• First silicon was successful and the first processor to run RS6000 or AIX.• First micro processor tapeout in Austin for Chipbench