Mario Orgis

Mario Orgis Email and Phone Number

Co-Founder / CTO at Last Mile Semiconductor @ Last Mile Semiconductor
Mario Orgis's Location
Dresden, Saxony, Germany, Germany
Mario Orgis's Contact Details

Mario Orgis work email

Mario Orgis personal email

n/a
About Mario Orgis

Mario Orgis is a Co-Founder / CTO at Last Mile Semiconductor at Last Mile Semiconductor. He possess expertise in asic, semiconductors, soc, verilog, embedded systems and 17 more skills. He is proficient in English.

Mario Orgis's Current Company Details
Last Mile Semiconductor

Last Mile Semiconductor

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Co-Founder / CTO at Last Mile Semiconductor
Mario Orgis Work Experience Details
  • Last Mile Semiconductor
    Co-Founder / Cto
    Last Mile Semiconductor Dec 2022 - Present
    Dresden, Saxony, De
    View
  • Deveritec Gmbh
    Chief Operating Officer
    Deveritec Gmbh Jan 2022 - Mar 2024
    Dresden, Sachsen, De
    Part of company management teamSuccessful re-organization of company and preparing company setup for long term growthMain responsibilities:- Project management office (Project execution and reporting, Ressource management)- HR/Hiring- Quality
    View
  • Siliconally
    Co-Founder / Chief Operating Officer
    Siliconally Apr 2019 - Dec 2021
    Dresden, Saxony, De
    Co-founder "From foundation to secure first investor and customer"Responsible for entire non-technical company building and setupincluding business development, finance, contracts, HR, quality, Marketing
    View
  • Racyics
    Chief Operating Officer
    Racyics Jan 2020 - May 2021
    Dresden, De
    Part of company management teamSuccessful re-organization of company and prepared company setup for long term growthMain responsibilities:- Business development - HR/Hiring (growth from 30 to 90 employees, driver for 2nd site)- Quality (Entire re-organization of company content management, Successful ISO9001 certification based on ground breaking digital content management)- Steering of finance and administration team
    View
  • Racyics
    Chief Operating Officer / Head Of Soc Design
    Racyics May 2018 - Dec 2019
    Dresden, De
    Team leader of System-on-Chip team (15+ engineers)
    View
  • Catena Group (Acquired By Nxp)
    Site Manager / Technical Project Manager / Team Leader
    Catena Group (Acquired By Nxp) Jan 2016 - Mar 2018
    ASIC designDevelopment of wireless low power Bluetooth PHY ASICCross-site and cross-domain technical project management of 28nm ASIC (project size 35+ engineers)Site Manager of Dresden office
  • Intel Corporation
    Team Leader / Technical Project Manager
    Intel Corporation Dec 2012 - Dec 2015
    Santa Clara, California, Us
    ASIC designDevelopment of wireless 4G/LTE IP for four generationsTeam lead and project managerCross-domain and cross-site project management4G/LTE-Modems: https://en.wikipedia.org/wiki/Intel_XMM_modems#4G_modems
    View
  • Intel Corporation
    Senior Digital Ic Engineer
    Intel Corporation Jan 2011 - Aug 2012
    Santa Clara, California, Us
    ASIC designDevelopment of wireless 4G/LTE IP for four generationsResponsible for low power ASIC Synthesis
    View
  • Blue Wonder Communications Gmbh
    Senior Digital Ic Engineer
    Blue Wonder Communications Gmbh Aug 2009 - Jan 2011
    De
    Blue Wonder Communications got acquired by Intel.FPGA design in startup environmentDevelopment of wireless 4G/LTE IPResponsible for Multi-FPGA prototyping system
    View
  • Zmdi
    Digital Ic Engineer
    Zmdi Oct 2007 - Jul 2009
    ASIC and FPGA DesignDevelopement of wireless low power Zigbee transceiver ASICResponsible for RTL2GDS digital design flow and FPGA design flow
  • Ember Corporation
    Digital Ic Engineer
    Ember Corporation Apr 2006 - Oct 2007
    Boston, Ma, Us
    ASIC and FPGA design in startup environmentDevelopment of wireless low power Zigbee System-on-Chip ASIC (ARM Cortex + Radio + Baseband)Responsible for FPGA prototyping system
    View
  • Chemnitz University Of Technology
    Student Staff
    Chemnitz University Of Technology 2004 - 2006
    FPGA designPCB design

Mario Orgis Skills

Asic Semiconductors Soc Verilog Embedded Systems Lte Fpga Debugging Wireless Cross Functional Team Leadership Digital Ic Design Project Management Organizational Effectiveness Fpga Prototyping Mixed Signal Ic Design Wireless Communications Systems Ic Engineering Management C Vhdl Integrated Circuits Wireless Technologies

Mario Orgis Education Details

  • Technische Universität Chemnitz
    Technische Universität Chemnitz
    Electronics And Communications Engineering

Frequently Asked Questions about Mario Orgis

What company does Mario Orgis work for?

Mario Orgis works for Last Mile Semiconductor

What is Mario Orgis's role at the current company?

Mario Orgis's current role is Co-Founder / CTO at Last Mile Semiconductor.

What is Mario Orgis's email address?

Mario Orgis's email address is ma****@****tec.com

What schools did Mario Orgis attend?

Mario Orgis attended Technische Universität Chemnitz.

What skills is Mario Orgis known for?

Mario Orgis has skills like Asic, Semiconductors, Soc, Verilog, Embedded Systems, Lte, Fpga, Debugging, Wireless, Cross Functional Team Leadership, Digital Ic Design, Project Management.

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