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Insightful electrical engineer with an extensive semiconductor industry background in analog/mixed-signal integrated circuit (IC) design, consumer / pro audio electronics, sensor interfacing, and digital power management. This includes core IP creation, chip architecture development, and transistor-level circuit design intended for high performance silicon and volume mass-production. Prior work experience also includes several years in engineering design management, and hardware applications support roles. Technical cross-collaboration efforts and individual mentoring skills have been developed and refined throughout many successful chip design projects. Four ISSCC conference papers have been authored in the field of mixed-signal IC design, one as first author/presenter, and three others as co-author. Thirteen granted US patents.Technical specialties:MATLAB/Simulink model based design for mixed-signal chip architecture development, digital signal processing subsystems, and power management system level analysisAnalog/mixed-signal IC design, including chip floorplanning and IP integration at both the cell and top levelLow-distortion audio amplifier design for both high power (loudspeaker) and low power (headphone) applicationsPower electronics circuits and discrete-time numerical (DSP based) control systems for DC-DC power conversionDesign management from initial conception through final design reviews and production releaseConsumer electronics teardown, reverse engineering, design modification / characterization and report generationPCB design, floorplanning, and layout for general mixed-signal, audio, and power electronics applicationsExtensive laboratory skills and familiarity with a wide variety of professional test & measurement equipmentProfessional technical writing for application notes, contributed journal articles, conference papers and product datasheetsWell rounded interpersonal skills and good communications attributes - both oral and written
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Principal EngineerRenesas ElectronicsAustin, Tx, Us
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Principal Ic Design EngineerRenesas Electronics Jul 2022 - PresentKoto-Ku, Toyosu, Tokyo, JpCurrently involved in chip architecture and IP/algorithm development for multi-phase digital PWM power supply controllers used in both compute infrastructure (datacenter) and mobile (client/notebook computer) vcore applications.
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Consulting EngineerAlpha & Omega Semiconductor Jun 2019 - Apr 2022Sunnyvale, Ca, UsNumerical analysis of digital constant-on-time (COT) multi-phase power converter PWM control loop architecture. Fixed point MATLAB/Simulink modeling of D-COT control system, including secondary & tertiary sub-loops, as well as power electronics buck subsystem & load modeling with the Simscape/Electrical toolbox.Architecture redesign: new dynamic phase management algorithm for lower noise induced add/drop chatter; new diode braking algorithm for improved entry/exit triggering in the presence of system noise.Specification writing for proposed new chip algorithms & subsystems, as well as general control loop training material development. -
Consulting EngineerCardi/O® By Advanced Telesensors Sep 2017 - Dec 2018Austin, Texas, UsAnalog/mixed-signal board-level circuit development for radar sensor baseband-interface used in non-contact heart and respiration rate measurement subsystem (market: health monitoring of long distance truck drivers). Noise analysis of existing front-end design and modifications for 4-5dB lower integrated baseband noise. -
Principal EngineerAms Ag Dec 2013 - Jun 2017Premstaetten, AtInvolved in silicon-based optical sensor development for portable and tethered device applications:System and analog circuit design for digital output ambient light sensors (ALS).AFE architecture and circuit design for improved dynamic-range multichannel hyperspectral sensors.Charge-transfer analysis of non-ideal ADC analog circuit behavior on electrical response of N-well dual photodiode.Redesign of switched-capacitor ADC front end for photodiode leakage reduction (reduced dark count).Macro-modeling of complex analog circuits intended for proximity sensing using large area sensors.MATLAB/Simulink modeling & improvement of auto-zero algorithm in photodiode front-end digitizer.Circuit design/simulation using Cadence Virtuoso 6.1.5, with ADEXL test benches and Spectre simulator. -
Consulting EngineerVidatronic, Inc Jan 2013 - Jul 2013Austin, Texas, UsConsulting engineering and design services for Mixed-Signal I/O and Power Management circuits and systems:Design consulting and layout reviews for a 180nm power management ICMixed-signal I/O redesign and fab port from TSMC 28nm to GF 28nm (AMD subcontract) -
Co-Founder And CtoEquiphon, Inc. Sep 2007 - Nov 2012UsProduct Focus: Class-D audio amplifiers for the consumer electronics industry.As a co-founder, recruited and mentored key members of the technical staff. Also participated in fundraising activities required to launch company, and secure seed round as well as series-A financing.Assisted marketing/sales with company introductions in Asia, and customer product sampling/support activities.Specified core signal processing requirements for an all-digital 20W/channel IC class-D amplifier.Developed hardware efficient noise-shaped, multi-edge, PWM/DSP algorithm in MATLAB/Simulink (>110dB SNR, suitable for consumer Hi-Fi audio devices).Analyzed modulator performance on bench using Xilinx FPGA emulator and custom PWM daughter board.Audio feature processing development - 10-band parametric EQ, LR4/LR2 crossovers, 2-band dual-slope dynamic range controller (DRC) in MATLAB/Simulink.Developed AM-radio band EMI mitigation algorithm (MATLAB), which was implemented in silicon. Also did subsequent radiated emissions testing in 10m EMC chamber with rev-B customer samples.Oversaw functional partitioning and IP development for this 2 chip design – DSP/MCU/PLL/PWM controller IC in 130nm TSMC CMOS, and separate Analog/Power high-current output stage in Dongbu 180nm 36V BCD technology.Tear-down of consumer products using competitive class-D devices and preparation of analysis/reports.Wrote preliminary product datasheet to kick start customer discussions.Designed applications eval kit hardware, and oversaw PCB layout using outside contractor. Managed all kitting and PCB builds with local SMD assembly house.Designed Li-Ion battery charger & boost converter subsystem for a 10W/channel portable version of the EVM.Managed chip FW development (8051) and Windows GUI software tool, used to control evaluation kit via wired USB link. Contributed IIR (Biquad) discrete filter design equations, used in equalizer and crossover filter tab selections for customer GUI.Four US patents granted. -
Consulting EngineerSilicon Labs Jul 2007 - Aug 2007Austin, Tx, UsInitial product feasibility study for class-D amplifier development program, targeted at portable and mid-level consumer audio equipment. -
Director Of System EngineeringJam Technologies Mar 2006 - Jun 2007UsProduct definition and system/IC design lead for monolithic, high-voltage, multi-level/sub-ranging class-D amplifiers, targeted at high volume consumer audio applications:Initially responsible for product definition & feature set specification as a senior member of Marketing.Assessed potential IC product specs for mobile device applications incorporating class-D amplifiers.Led chip architecture development for new family of multi-level class-D ICs for the flat-panel TV market.Developed improved synchronous clocking approach and simplified PWM computation scheme for a multi-level class-D output stage.Performed detailed system level analyses of sub-ranging PWM hardware and associated power-stage electronics, using Simulink behavioral & physical level models.Developed detailed circuit specifications for several power stage subsystems as a result of this modeling effort.Created product development and resource schedules. -
Consulting EngineerIntersil Dec 2005 - Feb 2006Koto-Ku, Toyosu, Tokyo, JpEngineering development at D2Audio in the area of mixed-signal circuit and system design for feedback processing in digitally modulated class-D PWM audio amplifiers. -
Director Of EngineeringZilker Labs Jun 2003 - Oct 2005UsInitial engineering management hire, prior to securing series A funding. Significant activities involved recruiting the engineering team, control loop architecture development, system modeling/simulation, and mentoring other members of the design engineering staff:Developed hardware-efficient digital PID control loop and PWM signal processing architecture for ZL2005 power management IC.Conceived a non-linear response (NLR) hardware bypass processor design for fast recovery from line and load transients.Assisted with FPGA emulation development platform design for architecture validation – did extensive HW correlation testing against Simulink system level model.Developed ADC input filtering and PWM signal processing flow, buck stage physical model and power MOSFET macro-models, using MATLAB/Simulink and Power Systems Toolbox.Participated in several customer visits to refine overall product definition, and build interest in go-to-market plan.Three US patent disclosures filed (hardware efficient digital control loop, nonlinear-response fast transient processor & integration of both). Four US patents granted. -
Co-FounderSiliconvergence Aug 2002 - Apr 2003Principally responsible for technical product definition and chip architecture specifications of a mixed-signal SoC for consumer digital/analog HDTV interfaces (incl. DVI/HDMI) which was targeted at the flat panel TV market.
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Director Of EngineeringCirrus Logic Apr 1994 - Jul 2002Austin, Tx, UsOversaw and managed high performance audio converter design. Initially hired as an IC design engineer working on PC audio. Focused on ADCs, DACs and mixed-signal codecs for high-end consumer, pro-audio and PC. Managed design engineering staff, created resource and project schedules, supervised chip layout, and evaluated new design tools. Developed chip specifications in conjunction with systems engineering staff. Four US patents granted.Managed design and layout for a multi-bit 114dB SNR 192kHz low-power audio ADC (CS5361) using multi-bit delta-sigma modulation and 2nd order DWA. Device met all analog specs on rev A0, and was released to production with one digital core & padring metal revision. Paper presented at ISSCC ’03.Directed research and development for the CS4396/97/122, the first commercially successful 120dB+ SNR, 24b/192kHz, PCM/DSD audio DAC using multi-bit delta-sigma modulation. Oversaw final debug and production mask revisions (including all I/O cell & padring modifications) for the full release of this audio DAC family. Co-authored ISSCC 2000 short conference paper on multi-bit DAC DWA processor design.Developed industry's first AC'97 audio codec (CS4297) in the PC products division. Project kick-off to tapeout was 5-1/2 months, and functional A0 silicon was sampled to Intel on schedule.Redesigned the ADC and DAC sections for new low cost ISA audio codec (CS4235), in 0.35u 3 metal CMOS, using an improved high-density layout technique.Designed switched-capacitor analog portion (ADC, DAC & reference) of two mixed-signal 0.6u CMOS chips targeted at the PC audio market (CS4236 and CS4237B/38B). Assisted heavily in digital debug, succeeding in jointly identifying (and fixing) many difficult problems with custom and standard-cell digital sections. Co-authored ISSCC ’96 conference paper.Led architecture and design integration of small RISC DSP, intended to perform 3D audio processing using licensed technology from SRS Labs Inc. and QSound Inc. -
Staff Design EngineerNational Semiconductor Jun 1990 - Apr 1994Researched and designed the analog front-end circuitry for new generation of DSP-intensive mixed signal converter products, using in-house 1u BiCMOS and 0.8u CMOS processes:Designed a switched-capacitor 2/2 cascaded 16-bit delta-sigma A/D converter with a final sampling rate of 192kHz and signal bandwidth of 96kHz. It was marketed into the industrial signal acquisition and instrumentation space. Presented a paper concerning the implementation of this ADC design at ISSCC '94.Designed the ADC and DAC analog circuitry in a stereo audio codec for Apple Power PC computers, which was intended to be a second source to the Crystal Semiconductor CS4217.Undertook a detailed investigation of different topologies for implementing high order delta-sigma modulators.
Mark Alexander Skills
Mark Alexander Education Details
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Uc Berkeley ExtensionElectrical And Electronics Engineering -
University Of TorontoElectrical And Electronics Engineering
Frequently Asked Questions about Mark Alexander
What company does Mark Alexander work for?
Mark Alexander works for Renesas Electronics
What is Mark Alexander's role at the current company?
Mark Alexander's current role is Principal Engineer.
What is Mark Alexander's email address?
Mark Alexander's email address is ma****@****lby.com
What is Mark Alexander's direct phone number?
Mark Alexander's direct phone number is +151229*****
What schools did Mark Alexander attend?
Mark Alexander attended Uc Berkeley Extension, University Of Toronto.
What skills is Mark Alexander known for?
Mark Alexander has skills like Mixed Signal, Semiconductors, Analog, Soc, Ic, Cmos, Fpga, Circuit Design, Digital Signal Processors, Consumer Electronics, Signal Processing, Asic.
Who are Mark Alexander's colleagues?
Mark Alexander's colleagues are Bao Phan, Annie Roo, Ramachandraiah Kommineni, Rick Corbo, 韦常明, Cassie Wu, Dheeraj Prakash.
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