Who is Mark Bennett? Overview
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Mark Bennett is listed as Sondrel at Sondrel, based in Chippenham, England, United Kingdom. AeroLeads shows a work email signal at sondrel.com and a matched LinkedIn profile for Mark Bennett.
Mark Bennett previously worked as Silicon Project Manager at Sondrel and UK Engineering Head at Sondrel. Mark Bennett holds Beng, Electrical And Electronic Engineering from University Of Bristol.
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About Mark Bennett
I have over 30 years experience in the electronics industry covering all areas from firmware development through to leading teams to tape-out of complex semiconductor products measured in 100's of millions of transistors.I have worked in a variety of companies developing end products, IP, EDA software, complex Systems on Chip and providing design services. As a result I can see and appreciate the bigger picture and take this into account when making decision.I have a strong and demonstrated mix of technical and leadership skills that enable me to guide and motivate a team to produce the correct quality product in the fastest possible timescales.My goal is to be using this mix of knowledge, experience and leadership to lead a significant engineering team to produce world leading products.
Listed skills include Soc, Semiconductors, Ic, Eda, and 31 others.
Mark Bennett's current company
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Mark Bennett work experience
A career timeline built from the work history available for this profile.
Silicon Project Manager
Current
Uk Engineering Head
My role as UK Engineering Head has mainly involved managing a team of mixed discipline engineers across multiple locations in the UK and Europe to deliver semiconductor and associated software design services to a number of end customers.This has included a range of activities including pre-sales support & project estimation, project planning & execution management, technical problem solving, customer interface and liaison at management and engineering levels. The services supported included fixed price turnkey projects as well as time and materials based ODC teams.My responsibilities also included line management for my team, including recruitment, project resource assignment, performance management and reporting.Further my role has included driving RnD activities, flow development, EDA tool selection, EDA license estimation and management, and working closely with EDA vendors to ensure license needs are met and tool issues are resolved with minimal project impact.Finally I have driven specifying the improvement of Sondrel's engineering infrastructure, supported the IT team to deploy this and provided front-line support to the global engineering team to ensure engineer's problems were resolved as swiftly as possible.
Director Of Cad And Methodology
As Director for CAD and Methodology for Dialog I was responsible for a global team providing and supporting existing and new methodologies to Dialog's engineering teams to help increase efficiency and design quality. Significant developments in these areas included reachability analysis, analogue circuit design rule checking and constraint driven analogue routing.My team was also responsible for providing standardised design & project environments, compute farm management (in close coordination with IT) and global license management. In particular the licensing methodology was significantly improved to allow very rapid scaling of critical licenses during project peaks and clashes.My team provided support and co-ordination for all PDK used within Dialog, interfacing between the process development teams, foundries and design teams, incorporating process updates, ensuring tool compatibility, investigating accuracy issues and developing hot fixes for bugs in foundry PDK. We also handled the tape-out process including delivery to the foundries and checking the masks had been made correctly.My team were also responsible for Design For Test, providing the interface between design teams and production egineering for the majority of project teams. One key innovation in this area was the development and introduction of self-test and trimming for analogue circuits leading to a significant reduction in production test time.I was responsible for management of my teams, including communication with executive staff and engineering directors, analysis of design team requests, review and direction of project targets and progress, resource allocation, task prioritisation, objective setting & assessment and recruitment.
Construction Project Manager
Following being made redundant from my previous employer in June 2013 I decided to take a sabbatical to oversee the build of a low-energy house in Chippenham, Wiltshire, where we currently live.During this time, I worked on-site most days with the building team to ensuring the drawings were being interpreted properly and that the work was being done to the correct standard. I also designed the electrical, structured cabling, plumbing layout and airtightness strategy for the house. I designed and implemented the extensive home automation system as well as selecting and sourcing many of the materials and specialist services for the build.This provided an interesting perspective on project management outside of the semiconductor industry, including the need to select and source materials at very short notice, liaising and negotiating with service providers and taking my turn to make the tea!
Member Of Bristol Senior Management Team
In 2011 I became a member of ST's Senior Management Team in Bristol. The team are responsible for deciding site specific policies and strategies to ensure a good working environment for the staff and to help encourage motivation.Specific personal responsibilities have included the development and execution of the Summer Internship Program and the creation of a site Career Committee to look at options for internal mobility and flexibility.
Upd Bristol Research And Development Site Deputy
In this role I report directly to the RnD Director for CHD and deal with local administration issues. This includes information flow between management and the different team leaders in Bristol, the co-ordination of performance and compensation reviews between HR and team managers (both on and off-site) and providing information and guidance on UK specific employment aspects.
Upd Bristol Soc Development Manager
I am responsible for the CHD (Connected Home Division) System on Chip team in Bristol managing chip design from architecture through to tape-out for complex Set-Top-Box chips in leading edge manufacturing processes.I manage a team of experienced engineers in all disciplines to produce product at a high quality level and on the agreed schedule. This has required close involvement with the CAD team, IP providers (both internal and external), other SoC design teams within CHD in France, India and the US and with the global Program Management organisation.
St40 Cores Design Manager
Following the re-absorption of SuperH activities into its parent companies I was responsible for all CPU core development within ST around the SuperH architecture.This involved leading a small, motivated and experienced team to develop and promote the SuperH cores within ST. Specific responsibilities included gathering internal customer requirements, competitive analysis and benchmarking, developing and agreeing development roadmaps and supervision of the execution of development products.The main achievement was the development of a new ST40 (SH-4) implementation with longer pipelines to achieve faster clock speeds. This achieved first time silicon success and became the most performant application processor used in ST's Set Top Box and Digital TV divisions' products until superseded by ARM in 2011.
Member Of Industrial Advisory Board (Electrical And Electronic Engineering)
As a member of the department's Industrial Advisory Board, I take part in regular meetings to review their status and plans and provide advice to help increase their success. Areas covered include input on courses offered and associated material, requirements for graduates, industrial liaison and guidance on the handling of administration issues inside the University.
Uk Hardware Engineering Manager
I was one of the founder members of SuperH and was heavily involved in the setup of the organisation based on the originally defined business plan. In particular this included an instrumental role in defining the infrastructure and design flows for the company, both gathering and consolidating requirements from internal customers and exploring implementation options with external service providers.Throughout my time in SuperH I was responsible for the Bristol hardware and CAD development teams at all levels as well as acting as local IT deputy. I also had significant input into the documentation and packaging of SuperH Intellectual Property products to simplify their usage and integration within SuperH's customers.I successfully managed projects including design services for porting and support of SuperH cores and the design and the development of reference devices and platforms, including coordination with external packaging and manufacturing test organisations.In 2004, the parent companies decided to stop activity in SuperH as a separate entity and to repatriate staff into their respective organisations.
St40 Design Team Leader
As ST40 Design team Leader I was responsible for the ST implementation of the Hitachi ST40 RISC processor for use in ST's SoC products. This involved leading a team of engineers (both technically and administratively) as well as extensive communication with the original design team in Japan to ensure successful implementation of the core.Considerable cooperation was required with local CAD teams to cope with unfamiliar design styles, and SoC teams inside ST to integrate the core.The ST40 CPU went on to become the main CPU within ST's Set-Top Box and Digital TV SoC platforms until superseded by ARM in 2011. The first products are still in production in 2012.
Senior Design Engineer
In Cadence Design Systems I was a member of the Spectrum Design Services organisation, providing design consultancy and project execution for a number of Cadence customers both in Cadence offices and at customer sites.While very much a technical role, I was also involved in the bidding process to help develop Statements of Work defining the proposed work.Technical work included RTL design & verification, physical implementation & verification as well as extensive timing analysis work.
Senior Hardware Engineer
Senior Design Engineer
Mark Bennett education
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University Of Bristol
Frequently asked questions about Mark Bennett
Quick answers generated from the profile data available on this page.
What company does Mark Bennett work for?
Mark Bennett works for Sondrel.
What is Mark Bennett's role at Sondrel?
Mark Bennett is listed as Sondrel at Sondrel.
What is Mark Bennett's email address?
AeroLeads has found 1 work email signal at @sondrel.com for Mark Bennett at Sondrel.
Where is Mark Bennett based?
Mark Bennett is based in Chippenham, England, United Kingdom while working with Sondrel.
What companies has Mark Bennett worked for?
Mark Bennett has worked for Sondrel, Dialog Semiconductor, Home, Stmicroelectronics, and University Of Bristol.
How can I contact Mark Bennett?
You can use AeroLeads to view verified contact signals for Mark Bennett at Sondrel, including work email, phone, and LinkedIn data when available.
What schools did Mark Bennett attend?
Mark Bennett holds Beng, Electrical And Electronic Engineering from University Of Bristol.
What skills is Mark Bennett known for?
Mark Bennett is listed with skills including Soc, Semiconductors, Ic, Eda, Asic, Microprocessors, Rtl Design, and Processors.
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