Mark Chiu Email & Phone Number

Taichung City, Taiwan

Technology Development Taiwan team for DRAM process research and development work in Taiwan.Team lead of advanced DRAM FEOL process development.Solution provider for scribe mark design, structure function enablement,film stack optimization for process window enlargement.

Hiroshima, Japan

Technology Development Taiwan team for Advanced DRAM FEOL process research and development work in Japan.

Boise, Idaho, United States

Expatriate in US Boise RD fab for DRAM product research and development

Taichung City, Taiwan

Product Development Engineer in Taiwan Technology Center

Taichung, Taiwan

• DRAM product transfer from RD fab to HVM fab.DRAM process ramping and yield improvement. Process parameters/tool arrangement/new process tool/evaluation of new process condition.Co-work with TD/IE for new generation.
• MLR process introduction for Bit-line process. LWR(Line Width Roughness) 10% improvement.
• In-device overlay tool evaluation.
• Coordinator of new product unique tools and co-work with EE/IE/PUR.
• New process overlay analysis to reduce rework ratio from 80% to 40%.
• Cpk improve to 1.33 project.**New Scanner Model process coordinator

Taichung, Taiwan

In responsible of semiconductor process maintenance, improvement, development. Quality System(SPC, JMP, R2R) and new generation process introduced.Projects1. Polyimide process recipe optimization for wafer surface defect count reducing.Increase wafer output at probe process and reduce probe testing cycle time.2. Implant loop process time reducing to get.

Taipei City, Tawian

Graduate student reseacher