Mark R.

Mark R. Email and Phone Number

Pre-Silicon Verification Engineer at Intel Corporation @ Intel Corporation
(408) 765-8080
Mark R.'s Location
Eau Claire-Menomonie Area, United States, United States
About Mark R.

Former accomplished Engineering Manager with a demonstrated history of managing multiple teams across multiple geographies.My experience has focus in software and hardware development through validation of SoC ASICS and High Performance Computers. Building software tools and environments from the ground up utilized throughout the products life cycle.

Mark R.'s Current Company Details
Intel Corporation

Intel Corporation

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Pre-Silicon Verification Engineer at Intel Corporation
(408) 765-8080
Website:
intel.com
Employees:
10
Mark R. Work Experience Details
  • Intel Corporation
    Pre-Silicon Verification Engineer
    Intel Corporation Sep 2019 - Present
    Santa Clara, California, Us
  • Intel Corporation
    Engineering Manager
    Intel Corporation Jul 2011 - Sep 2019
    Santa Clara, California, Us
    Managing engineering team developing software applications and tools utilized across multiple Intel architectures. Oversees team to deliver on schedule software framework, tests and tools used in OmniPath generation 100 and 200 fabric validation. Leading team through planning, development and execution. Accelerating power on exit times of all three products in the OmniPath programs.
  • Cray Inc.
    Engineering Manager & Software/Hardware Engineer
    Cray Inc. 2009 - 2012
    Houston, Texas, Us
    Engineering team member tasked with planning and developing software tools, tests and infrastructure utilized in the validation and debug of next generation high performance computer systems. Engineered tests, tools and infrastructure, utilizing C, C++, Python, for Validation, Manufacturing Test and Field Support that increased system reliability out of manufacturing and enabled field support personal to quickly debug failures in systems deployed at customer locations. Utilized strong debug and problem-solving skills in the power on, bring up and release of new architectures that enabled faster bring-up phases and product reliability and quality. Promoted to Engineering Manager taking responsibility for forecasting and managing budgets and resources to program deliverables and commitments.
  • Sgi
    Design Verification Engineer
    Sgi 2001 - 2009
    Milpitas, Ca, Us
    Developed pre-silicon verification tests that are run against ASIC design simulations to identify and debug design bugs. Developed and worked with RTL test benches written with Verilog. Root caused many RTL bugs throughout my career increasing design health through product lifecycle.

Mark R. Education Details

  • University Of Wisconsin-Eau Claire
    University Of Wisconsin-Eau Claire
    Software Engineering And Mathematics

Frequently Asked Questions about Mark R.

What company does Mark R. work for?

Mark R. works for Intel Corporation

What is Mark R.'s role at the current company?

Mark R.'s current role is Pre-Silicon Verification Engineer at Intel Corporation.

What schools did Mark R. attend?

Mark R. attended University Of Wisconsin-Eau Claire.

Who are Mark R.'s colleagues?

Mark R.'s colleagues are Abby Greenberg, Khayadada Sreedhara, Andrew Mcguire, Gayathri Bhaskar, Krishnanand Prabhu, Ramin Eghdami, Chakradhar Mella.

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