Mark Graham's Location
San Diego, California, United States, United States
Mark Graham's Contact Details
Mark Graham work email
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About Mark Graham
Digital and Analogue electronic design Engineer:High speed serial interfaces (up to 6Gb/s): PCI-Express Gen2, SATA, USB2. High speed memory to 64bit 667MHz: SRAM, DRAM, DDR, DDR2, FlashSerial and parallel communication busses: PCI-Express, PCI-X, PCI, SPI, I2C, RS232 System on a chip processors, FPGAs both large and small, embedded processorsOperating systems: Windows, Linux, VxWorksLove a challenge, Can't put a good project down until its finished and documented.Specialties: Efficient logical design approach to maximise first iteration design functionality.
Mark Graham Work Experience Details
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Electronic EngineerAccel Robotics Sep 2019 - PresentSan Diego, California, UsElectrical and Electronic design for a fast moving startup company. -
Electronic ConsultantSelf Employed Feb 2019 - Aug 2019Satellite Beach, Florida, UsWorking on Electronics projects for D and K Engineering and Accel Robotics. -
Electronics EngineerAsml Apr 2017 - Jan 2019Veldhoven, NlDesign of High speed critical timing control board using Xilinx Xilinx Zynq Ultrascale+ Multi-processor System on a chip, 1517pin BGA on a 14 layer PCB.* 15 Switch Mode Power Supplies* PCIe gen2, DDR4 SODIMM @ 1066MHz, USB 3.0 * Multiple Gigabit Ethernet interfaces using SGMII; both copper and SFP module -
Senior Electrical EngineerD&K Engineering Feb 2015 - Apr 2017San Diego, Ca, UsContract Design and Manufacture. No projects assigned yet. -
Electronic Hardware Design EngineerHewlett-Packard Mar 2011 - Feb 2015Houston, Texas, UsAn indefinite position in San Diego helping in the design of the second generation web press; large industrial inkjet printers printing at 1000feet/minute up to 40inch wide. Responsible for several of the front end digital pipeline PCAs for handling and processing large amounts of print data. Latterly the print head driver board mixing higher current regulators at 30V and 15A and high speed FPGAs with 3.75GHz optics. The second generation product was to be more reliable, faster and better quality than the first generation currently in the market. Key focus was time to market, uptime (diagnostic-ability) and long life.* PCB design with high speed and high power. 16 layer through to 6 layer. Compact PCI form factor and custom. * Switching power supplies: 3 phase 30A 0.9V output. 10A 0.9V at 3%. 30V 15A output and others.* FPGAs: Altera high end StratixIV and ArriaII. Xilinx low cost Artix.* STM32 and STM8 microcontrollers.* Memory on board; DDR2 64bit to 200MHz, PCI-Express Gen 2 at 5GHz.* DDR2 to 200MHz, PCI-Express Gen 2 at 5GHz, Altera StratixIV FPGA, Switching power supplies.* Fibre optic interfaces with SFP and QSFP up to 6.75Gb/s.* Tools: Cadence Allegro schematic capture and PCB layout supervision. Cadence and Hyperlynx (some Ansys) Signal integrity analysis. LT spice analogue simulation. -
Electronic Design Engineer (Contract)Hewlett-Packard May 2010 - Mar 2011Houston, Texas, UsA short contract to design and test a low cost, intelligent PCI-Express Ethernet card. Using an HP ASIC with ARM CortexA8 embedded processor, PCIe, 32bit DDR2, Media Access Controller (MAC), USB hosts and Device. The aim was to wake the printer from low power sleep modes whilst consuming minimum power. The design used A Broadcom MAC/PHY with special packet filtering to control wake events. A ST micro-controller handled the power control/supervision and reset functions. Because of the ever decreasing power limits in sleep mode, a new Analog Devices ADP1877 dual regulator was used to deliver 250mW to 6W power with high efficiency. The first revision of the board was delivered October 2010.* Technologies: DDR2 to 200MHz, PCI-Express, Gigabit Ethernet, low cost high efficiency switching power supplies.* ST Micro-controllers STM8 8 bit design cycle.* Tools: Cadence Allegro.
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DirectorRisk Control (Uk) Limited Dec 2008 - May 2010GbSmall webdesign projects. Voluntary paragliding competition scorer and organiser. -
Electronic Design Engineer (Contract)Hewlett-Packard Mar 2006 - Dec 2008Houston, Texas, UsSeveral back to back contracts to design and test large format printer components, working mainly in parallel for both high-end complex machines and low-end low cost machines. A new emphasis was placed on lower costs. Cost reducing current prototypes; PCB layer reduction, component selection and switching power supply re-design, both step-down and step-up. Designed a super low cost printer processor board. Doubling-up of memory chips on a current product board and switching power supply redesign, both for cost reduction. Finally, design of a prototype board for testing the high-end features of a new complex ASICDesigning a low cost stand alone PCI processor board to be used as an upgrade co-processor plug-in module to a current popular product. Design a new main board for the next generation printers.
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DirectorRisk Control (Uk) Limited Oct 2004 - Mar 2006GbBetween contractsSmall webdesign projects. Voluntary paragliding competition scorer and organiser.International Paragliding competition competitor.
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Electronic Design Engineer (Contract)Hewlett-Packard Apr 2001 - Oct 2004Houston, Texas, UsSeveral back to back contracts to design and test large format printer components. Working on a high-end, high throughput parts using 2Gb/s LVDS: Designing the PCBs for ASIC prototyping with FPGAs, through to system integration with the 2 ASICs. Also working on another PCB for FPGA prototyping, for a high throughput scanner application. Finally one more PCB design to test a new ASIC designed in HP Singapore: A high speed low cost design with maximum flexibility from minimum information.
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Electronic Design Engineer (Contract)Diagnostic Instruments Sep 2000 - Dec 2000Sterling Heights, Mi, UsA ten week contract to help the small project team meet the release deadline of a new data gathering computer. The hand-held unit was designed to be Intrinsically-Safe in order to target the petro-chemical and coal mining industries. Running Windows CE with an NEC 8121 RISC 65MHz processor, on-board flash memory, 100MHz SDRAM, keyboard and ¼ vga lcd display. -
Partner In BusinessParapente Ecosse Apr 1997 - Sep 2000Invested in and fundamental to the expansion of a paragliding business in Edinburgh. One of the two partners, with the responsibility for the management of the enterprise, instruction of the students and the planning and execution of business growth. Having bought and opened a shop close to the city centre the business continued to grow successfully. Decided to leave as the weather deteriorated annually.
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Electronic Design Engineer (Contract)Hewlett-Packard Oct 1994 - Dec 1996Houston, Texas, UsA longer term contract to design the control board for a next generation high-end, large-format printer. Involved from project start, choosing processor and architecture for maximum performance and data throughput. A new ASIC design cycle was being tested, using FPGAs to prototype and simulate the final ASIC, allowing development of the system software before the ASICs were available. The project was finished and bought to production with few problems.
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Electronic Design Engineer (Contract)Hewlett-Packard Jan 1994 - Sep 1994Houston, Texas, UsBased in South Queensferry near Edinburgh.A short term contract to re-vamp a processor card for a WAN probe. The contract entailed taking an existing prototype and reworking the schematics to encompass a few modifications. Timing and simulations were checked along with supervision of the layout. The board was also fully tested after manufacture.
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Electronic Design Engineer (Contract)Marconi Simulation Feb 1993 - Nov 1993Short term contract to design, document and test a data buffer and selection board for a radar simulator, and a test board for an upgrade package.
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Digital Design EngineerAlenia Aeronautica Apr 1990 - Jul 1992Roma, Roma, ItEmployed as a project engineer involved in the development of three similar computers. The computers were for the European Fighter Aircraft designed by consortium partners in Italy, England, Spain and Germany. -
Electrical EngineerRoyal Signals And Rader Establishment Sep 1987 - Feb 1990Employed as an analogue and digital design engineer involved in the design and procurement of new equipment for the army.
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Undergraduate EngineerMarconi Defence Systems Ltd 1982 - 1985Employed as a sponsored undergraduate engineer involved in project support. Sandwiched with full time university University.
Mark Graham Skills
Embedded Systems
Electronics
Firmware
Fpga
Pcb Design
Testing
Debugging
Asic
Integration
Simulations
Linux
Embedded Software
Analog Circuit Design
Integrated Circuit Design
Device Drivers
Software Engineering
Pcie
Ic
I2c
Vhdl
Arm
Verilog
System Architecture
Hardware Architecture
R&d
Electrical Engineering
Microcontrollers
Computer Hardware
Product Development
Hardware
Mark Graham Education Details
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University Of BirminghamCiv Eng
Frequently Asked Questions about Mark Graham
What company does Mark Graham work for?
Mark Graham works for Accel Robotics
What is Mark Graham's role at the current company?
Mark Graham's current role is Electronic Engineer at Accel Robotics.
What is Mark Graham's email address?
Mark Graham's email address is ma****@****ive.com
What schools did Mark Graham attend?
Mark Graham attended University Of Birmingham.
What skills is Mark Graham known for?
Mark Graham has skills like Embedded Systems, Electronics, Firmware, Fpga, Pcb Design, Testing, Debugging, Asic, Integration, Simulations, Linux, Embedded Software.
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