Creation of complex mixed-signal IO ASIC design blocks. Ownership of all backend implementation for custom/mixed-RLS designs from tech readiness to tape-out. This includes RTL->netlist translation, routing/placement for both custom/sensitive analog circuits as well as synthesis logic. Performing the convergence of Static timing, noise, reliability, and layout requirements within the design, as well as supporting integration of custom analog components and RLS within the design and roll-up… Show more Creation of complex mixed-signal IO ASIC design blocks. Ownership of all backend implementation for custom/mixed-RLS designs from tech readiness to tape-out. This includes RTL->netlist translation, routing/placement for both custom/sensitive analog circuits as well as synthesis logic. Performing the convergence of Static timing, noise, reliability, and layout requirements within the design, as well as supporting integration of custom analog components and RLS within the design and roll-up of the design to full-chip. Technical leadership and mentoring of a team of junior engineers to impart my experience on design of these circuits through training, tutorials, and guidance. Show less

Instructor for Electronics I, II, and III starting with Microelectronic Circuits by Sedra & Smith, and the basics of BJT's, MOSFETs, Diodes, using Op-Amps in circuits, and single stage amplifiers. Continuing on with multi-stage and differential amplifiers, biasing, frequency response, current mirrors and active loads, and designing full Op-Amp circuits. Finally, covering linear Op-Amp circuits, active high order filters, output stages and power Amps, comparators, oscillators, waveform… Show more Instructor for Electronics I, II, and III starting with Microelectronic Circuits by Sedra & Smith, and the basics of BJT's, MOSFETs, Diodes, using Op-Amps in circuits, and single stage amplifiers. Continuing on with multi-stage and differential amplifiers, biasing, frequency response, current mirrors and active loads, and designing full Op-Amp circuits. Finally, covering linear Op-Amp circuits, active high order filters, output stages and power Amps, comparators, oscillators, waveform generators, A/D and D/A converters, multipliers, and CMOS domino IC logic. Show less

Founded IntelliGems LLC to develop Apps for mobile platforms. Initial work for Apple products on iOS, using Objective-C with the Xcode developer kit. Released “Beyond Tic Tac Toe” to App store in 2015, a vehicle for creating something I was passionate about while learning specific techniques necessary for iOS app development.• Self-motivated ownership of a full project design and application from concept definition through product release.• Demonstrated creativity, independent… Show more Founded IntelliGems LLC to develop Apps for mobile platforms. Initial work for Apple products on iOS, using Objective-C with the Xcode developer kit. Released “Beyond Tic Tac Toe” to App store in 2015, a vehicle for creating something I was passionate about while learning specific techniques necessary for iOS app development.• Self-motivated ownership of a full project design and application from concept definition through product release.• Demonstrated creativity, independent learning, and AI, UI, and UX design capabilities.• Required in-depth utilization of GameKit, iAd, StoreKit, CoreGraphics, UIKit, and Foundation iOS frameworks. Show less

Working as a contractor for Intel Corp on complex mixed-signal IO ASIC design blocks. Ownership of all backend implementation for a custom/mixed-RLS design from tech readiness to tape-out. This includes RTL->netlist translation, routing/placement for both custom/sensitive analog circuits as well as synthesis logic. Performing the convergence of Static timing, noise, reliability, and layout requirements within the design, as well as supporting integration of custom analog components and RLS… Show more Working as a contractor for Intel Corp on complex mixed-signal IO ASIC design blocks. Ownership of all backend implementation for a custom/mixed-RLS design from tech readiness to tape-out. This includes RTL->netlist translation, routing/placement for both custom/sensitive analog circuits as well as synthesis logic. Performing the convergence of Static timing, noise, reliability, and layout requirements within the design, as well as supporting integration of custom analog components and RLS within the design and roll-up of the design to full-chip. Show less

Working in a team to develop software solutions for commercial companies. Ramping up quickly to become productive on new languages, technologies, and platforms. Collaborating effectively with others in 4 separate remote locations.• Learning Python, Bash, JavaScript, and Java independently and with mentoring from co-workers. Excited to learn new things and not adverse to asking for help in new areas.• Utilizing Ubuntu Linux platform and Git/GutHub for code sharing and file merging… Show more Working in a team to develop software solutions for commercial companies. Ramping up quickly to become productive on new languages, technologies, and platforms. Collaborating effectively with others in 4 separate remote locations.• Learning Python, Bash, JavaScript, and Java independently and with mentoring from co-workers. Excited to learn new things and not adverse to asking for help in new areas.• Utilizing Ubuntu Linux platform and Git/GutHub for code sharing and file merging across multiple sites. Show less

At Intel, I have a proven track record of owning some of the most difficult circuit blocks on a chip, designing and floorplaning them to run seemlessly through standard design validation flows, and finishing ahead of expectations while helping teammates complete their work.Worked on nine microprocessor (uP) designs, covering 0.25um through 14nm process technologies, with circuits designed to operate from 333MHz up to 9GHz clock speed. Progressive responsibility over circuit blocks… Show more At Intel, I have a proven track record of owning some of the most difficult circuit blocks on a chip, designing and floorplaning them to run seemlessly through standard design validation flows, and finishing ahead of expectations while helping teammates complete their work.Worked on nine microprocessor (uP) designs, covering 0.25um through 14nm process technologies, with circuits designed to operate from 333MHz up to 9GHz clock speed. Progressive responsibility over circuit blocks containing Domino, Register File, PLA/ROM, Phase Lock Loop (PLL), clock distribution, pulse clock circuit, and Low Voltage Swing (LVS) technologies. Leadership in all aspects of IC design from requirement gathering and specification development to post-Si debug. Collaborative work as a Technical Lead (TL) over areas ranging from 8 to 30 people, was a first line manager over groups from 6 to 12 in size, and second line management experience in a group >40 people. Show less