Senior Director with extensive experience leading the architecture, design, verification, and physical design of system on a chip (SoC) components for mobile and server applications. Delivered industry leading high-quality designs which met all performance, power, and area targets. Managed project resources and schedules to deliver on time designs resulting in successful silicon bring-up of large complex SoCs. Experienced with staffing and leading large multi-site collaborative teams and leading the product definition, implementation, and verification. Core Competencies:- Custom Coherent On Chip Interconnect (Ring, Multi-Ring, Mesh)- Memory Controller and PHY (DDR4, DDR5)- L3 Cache Controller- Chip to Chip Interconnect- ARM System Memory Management Unit- ARM Interrupt controller- ARM Security and Debug Components24 patents filed and issued in the area of system-on-a-chip architecture. Contact: mmschaff@gmail.com