Circuit design, technical research, patent research, program management.

Responsible for all new product development.Project management and design of stacked die packages using commercially available components including DRAM, NAND and NOR Flash, SRAM, and ASIC devices.• SI (Signal Integrity) simulation and analysis to meet industry leading JEDEC DDR DRAM and NAND Flash ONFI standards.• Design, applications and program management engineering technical customer support for stacked die devices including mechanical design and thermal analysis.• Design simulation at the device and system level to verify specifications using Cadence Allegro design tools.• Device operation verification with ATE and in customer’s systems.• Test, manufacturing, product, and reliability engineering support.• Implemented and enforced ISO 9001 qualified design standards and documentation.• Supported qualification of components for aerospace operation.• Customers included Micron, Samsung, Hynix, Infineon, Nanya, Elpida, Intel, TRW, Boeing, Lockheed, and NASA.

Technical management of the principal US ASIC design center.• Complete design engineering project management responsibility from pre-sales to production release.• Strong pre-sales engineering customer support and board level design consulting including advanced industry standard inter-tool CAD design methodology, ASIC power dissipation, required power supply pinning and placement, analog cell design support and development, and internal clock design methodology.• Global NPI (New Product Introduction) program manager for new ASIC product line.• Customers included Intel, Apple, Cisco, Seagate, Infineon, General Motors, and Ford.

Developed the very successful digital “MH” and analog/digital “MA” series of gate arrays. Performed circuit design and layout, cell library design and layout, SPICE models, design and test methodology. Wrote comprehensive design manuals allowing customers to design, simulate and layout their own digital or mixed mode ASICs.

Complete circuit design and project responsibility for a full custom NMOS instruction unit for a 16 bit minicomputer.

Complete circuit design and project responsibility for a full custom NMOS instruction unit for a 16 bit minicomputer.