Mark Thomann Email & Phone Number

APPLICATIONS ENGINEERING MANAGER* Coordinate development of the product definition proposal and product development plan. * Create datasheets, technical notes and application design line to help the customer in all phases of development. * Serve as focal point for identification, management, decision-making, and resolution of issues that arise during product development. * Function as the project's technical primary point of contact, and provide status updates on progress, issues, and exceptions. * Ensure that projects meet production yield and productivity goals through the production ramp stage. * Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Made significant contributions to design, development and validation of testability circuits. * Evaluation, development and debug of complex test methods. Developed and debuged complex software programs to convert design validation vectors and drive complex test equipment. Created tests for validation and production test hardware solutions. Tested, validated, modified and re-designed circuits to guarantee component margin to specification.* Analyze and evaluated component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. * Analyzed early customer returns with emphasis on driving test hole closure activities. Created and applied concepts for optimizing component production relative to both quality and cost constraints. * Autonomously planned and scheduled own daily tasks, develops solutions to problems utilizing formal education and judgment.

Product Engineering of Multi-port DRAM- 1987 - 1995Product Marketing & Sales - 1996-1997Design Engineering. 1998-2001Full Custom physical design including:* Full chip floorplanning, place & route, physical verification.* Static timing analysis and timing closure, signal integrity.* Experience in clock and power implementation methodologies and practices in low power designs.* Understanding of hierarchical/timing driven layout methodologies and practices.* Circuit level comprehension of critical paths. Spice experience.* Experience with ICC, Primetime, Design Compiler.* Automation experience with scripting languages * Hierarchical and timing driven place & route.* Parasitic extraction and static timing analysis.* Power and noise analysis, clock tree analysis, signal integrity analysis.* Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Design, development and validation of testability circuits. Worked with designers, product engineer, test engineer and process engineers to resolve problems and implement corrective actions to allow for high volume production in multiple fabs.

Education record

Education record