Mark Thomann

Mark Thomann Email and Phone Number

Electrical Engineer
Mark Thomann's Location
Boise, Idaho, United States, United States
Mark Thomann's Contact Details

Mark Thomann personal email

About Mark Thomann

MICRON TECHNOLOGY - 1987 - 2001* Product Engineer * Product Engineer Manager for Multi-port Drams * Product Marketing Engineer* Design Engineer ManagerINAPAC TECHNOLOGY - 2002 - 2007* Product Engineer * Application Engineering Manager Knowledge: - CMOS, Analog/Digital Circuits, Layouts, Device Physics - Understanding of NV Memories, DDR, SRAM - Pre and Post Silicon Validation Methods and Techniques Skills: - Pre/Post Si Circuit (Analog/Digital) Level Debugging - Micro-Probing, Characterization, Testing Circuits - Simulation using Verilog, HSIM, HSPICE - Scripting in Perl, Unix - Experience in JMP and other Statistical Tools- Experience in DFM/DFT - Sort, Class (Probe/Test) Yield Analysis, Improvement and HVM experience- Working knowledge of test platforms - Strong analytical and problem solving skills - Excellent documentation and communication skills Education: - BS in Electrical/Electronics or Computer Engineering Experiences: - 20 Yrs in related fieldsSpecialties: *DRAM Design, probe, test, product engineering and applications engineering for commodity DRAM, DDR and SIP RAM.

Mark Thomann's Current Company Details

Electrical Engineer
Mark Thomann Work Experience Details
  • Inapac Technology
    Application Engineering Manager
    Inapac Technology Jun 2003 - Mar 2007
    APPLICATIONS ENGINEERING MANAGER* Coordinate development of the product definition proposal and product development plan. * Create datasheets, technical notes and application design line to help the customer in all phases of development. * Serve as focal point for identification, management, decision-making, and resolution of issues that arise during product development. * Function as the project's technical primary point of contact, and provide status updates on progress, issues, and exceptions. * Ensure that projects meet production yield and productivity goals through the production ramp stage. * Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Made significant contributions to design, development and validation of testability circuits. * Evaluation, development and debug of complex test methods. Developed and debuged complex software programs to convert design validation vectors and drive complex test equipment. Created tests for validation and production test hardware solutions. Tested, validated, modified and re-designed circuits to guarantee component margin to specification.* Analyze and evaluated component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability. * Analyzed early customer returns with emphasis on driving test hole closure activities. Created and applied concepts for optimizing component production relative to both quality and cost constraints. * Autonomously planned and scheduled own daily tasks, develops solutions to problems utilizing formal education and judgment.
  • Micron Technology
    Sr Design Engineer / Manager
    Micron Technology Jul 1987 - Oct 2001
    Product Engineering of Multi-port DRAM- 1987 - 1995Product Marketing & Sales - 1996-1997Design Engineering. 1998-2001Full Custom physical design including:* Full chip floorplanning, place & route, physical verification.* Static timing analysis and timing closure, signal integrity.* Experience in clock and power implementation methodologies and practices in low power designs.* Understanding of hierarchical/timing driven layout methodologies and practices.* Circuit level comprehension of critical paths. Spice experience.* Experience with ICC, Primetime, Design Compiler.* Automation experience with scripting languages * Hierarchical and timing driven place & route.* Parasitic extraction and static timing analysis.* Power and noise analysis, clock tree analysis, signal integrity analysis.* Responsible for ensuring the testability and manufacturability of integrated circuits from the component feasibility stage through production ramp. Design, development and validation of testability circuits. Worked with designers, product engineer, test engineer and process engineers to resolve problems and implement corrective actions to allow for high volume production in multiple fabs.

Mark Thomann Skills

Product Development Testing Product Engineering Dram Semiconductors Sram Electrical Engineering Mixed Signal Circuit Design Ddr Ic Vlsi Program Management Strategic Partnerships Analog Circuit Design Soc Silicon Analog Perl Cmos R&d Drc Characterization Ddr3 C Integrated Circuit Design Manufacturing Processors Rf Start Ups Electronics Debugging Asic Failure Analysis Linux Process Improvement Batteries Cadence Virtuoso Lvs Low Power Design Test Engineering Flash Memory Ddr2 Engineering Management Verilog Semiconductor Industry Yield Eda Product Marketing Cadence

Mark Thomann Education Details

Frequently Asked Questions about Mark Thomann

What is Mark Thomann's role at the current company?

Mark Thomann's current role is Electrical Engineer.

What is Mark Thomann's email address?

Mark Thomann's email address is ma****@****ail.com

What schools did Mark Thomann attend?

Mark Thomann attended Binghamton University, Boise State University.

What skills is Mark Thomann known for?

Mark Thomann has skills like Product Development, Testing, Product Engineering, Dram, Semiconductors, Sram, Electrical Engineering, Mixed Signal, Circuit Design, Ddr, Ic, Vlsi.

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