Vincent Martinez Email and Phone Number
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Senior Principal System Engineer>15+ years of experience in research & development of wireless communication systems, primarily for automotive applications. >Technical lead for various wireless communication projects>Awarded Master Inventor at NXP (25+ granted patents)Expertise:- Standardization / frequency-regulation / spectrum: company delegate and rapporteur at various frequency regulation bodies (ECC CEPT...) & industry standardization consortiums (IEEE, ETSI, C2C)- Deep knowledge of many wireless protocols (4G/5G/6G, C-V2X, DSRC, ITS-G5, WiFi IEEE 802.11p/bd, BLE, UWB, FMCW and OFDM radar), in particular on physical layers- Strong theoretical and practical background on communication theory- Algorithms & Signal Processing expert, MATLAB/Simulink expert - Real-Time embedded SW Architect- Proven innovation track record (25+ patents granted)- Technical lead for various large product development & research projects- Expertise throughout the entire development cycle of a product- Expertise in automotive applications: Radar, V2X/ITS, BMS
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Cto And Automotive Systems Innovations And Senior Principal EngineerNxp SemiconductorsToulouse, Occitanie, Fr -
Cto / Automotive Systems Innovations / Senior Principal EngineerNxp Semiconductors Jul 2020 - PresentEindhoven, Noord-Brabant, NlV2X standardization engineer: active participation at ETSI ERM TG37 (rapporteur of TR 103 688), ETSI ITS WG4, IEEE 802.11bdAlso active on:- V2X technical lead (algorithms, SW & HW Arch)- Wireless BMS- AI & Signal processing expert (incl. Radar)
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Cto / Automotive Systems Innovations / Senior System EngineerNxp Semiconductors Apr 2017 - Jul 2020Eindhoven, Noord-Brabant, Nl- V2X standardization (ETSI ERM TG37, ETSI ITS WG4, IEEE 802.11bd)- V2X technical lead (algorithms, SW & HW Arch)- AI & Signal processing expert (incl. Radar)
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Rf Power / Digital Front End Senior System EngineerNxp Semiconductors Apr 2014 - Apr 2017Eindhoven, Noord-Brabant, NlTechnical expert and lead for DFE solution on NXP AFD4400 device.• Algorithms innovation, definition and validation through performance simulations, implementation specification, and coordination of the development team. Deep knowledge of algorithms like DPD (Digital Pre Distortion), CFR (Crest Factor Reduction), Massive MIMO and Beamforming, DUC, DDC, QEC, time-synchronization• Real-time embedded SW Architect, with SW (system) partitioning to optimize performance, power consumption, costs. Includes functional mapping, MIPS and memory footprint, multi-core optimization• Frequent visits to tier-1 customers in Europe & China for presentations and customer supports• Lab measurements, validation of NXP DFE solution (PAPR, ACLR, ACP, EVM on R&S tools)• Work within a worldwide multicultural team.
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Digital Networking / Lte Layer1 System Engineer & Technical LeadFreescale Semiconductor Jul 2011 - Apr 2014Austin, Texas, UsAlgorithmic lead for Freescale Uplink Layer1 eNodeB SW.• Modem Algorithms design: Drive the design, validation and DSP implementation of advanced modem algorithms, including MIMO Equalization, Turbo/SIC schemes, Channel estimation, time offset and frequency offset measurements. Owner of Uplink Matlab Radio Link Simulator• Multicore SW architect. Define functional mapping for LTE Layer-1 over complex multi-core SoC such as Freescale QorIQ Qonverge B4860 for a variety of deployment and customers. Memory, MIPS and latency optimization expertise.• HW Arch definition contribution. SoC definition (number of cores, memories & buses, accelerators requirements)• Customer interface: Weekly communication, technical meetings with major Tier1 OEMs (Alcatel-Lucent, ZTE …). Workshops, presentations of Freescale’s devices and PHY modules/stacks.• Technical lead for a 10+ people project -
Digital Networking / Lte Layer1 System EngineerFreescale Semiconductor Aug 2006 - Jul 2011Austin, Texas, UsLTE & LTE-Advanced Layer1 DSP System Engineer> In depth knowledge of LTE and LTE-Advanced 3GPP Standard (36 series)> Advanced receivers algorithms (SIC, channel estimation and many more)> System knowledge from RF up to Layer2> Freescale DSPs & StarCore cores
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Rf Power / Internship, Digital Pre DistortionFreescale Semiconductor Feb 2006 - Jun 2006Austin, Texas, UsAnalysis and comparison of the methods and algorithms available for Digital PreDistortion (DPD) for RF HPA (High Power Amplifiers) used in third generation (UMTS) mobile telecommunication base stations (3G W-CDMA): Volterra Series, Neural Networks, Mixed Effects Models, 2D LUT, Memory Polynomials, Wiener and Hammerstein Models. Programming in Matlab of a Digital Pre Distortion model based on Volterra Series and validation on the real RF DPD bench.
Vincent Martinez Skills
Vincent Martinez Education Details
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Insa Toulouse - Institut National Des Sciences Appliquées De ToulouseMathematical And Statistical Modeling -
University Of LeicesterMathematics & Computer Science
Frequently Asked Questions about Vincent Martinez
What company does Vincent Martinez work for?
Vincent Martinez works for Nxp Semiconductors
What is Vincent Martinez's role at the current company?
Vincent Martinez's current role is CTO and Automotive Systems Innovations and Senior Principal Engineer.
What is Vincent Martinez's email address?
Vincent Martinez's email address is vi****@****hoo.com
What schools did Vincent Martinez attend?
Vincent Martinez attended Insa Toulouse - Institut National Des Sciences Appliquées De Toulouse, University Of Leicester.
What skills is Vincent Martinez known for?
Vincent Martinez has skills like System Architecture, Lte, Matlab, Digital Signal Processors, Rf, Semiconductors, Wideband Code Division Multiple Access, Embedded Systems, Embedded Software, Wireless, Radio Frequency, 3g.
Who are Vincent Martinez's colleagues?
Vincent Martinez's colleagues are Mohdzairi Mohdzin, Carla Knoop, Happy Jnv, Lisa Chou, Joe Wright, Vic Yuan, Ionut Bornoiu, Phd.
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