Marty Perrigo

Marty Perrigo Email and Phone Number

Senior Principal Research Engineer @ Tactical Computing Laboratories
New York, NY, US
Marty Perrigo's Location
New York City Metropolitan Area, United States, United States
Marty Perrigo's Contact Details

Marty Perrigo personal email

n/a

Marty Perrigo phone numbers

About Marty Perrigo

A highly skilled, self-motivated, hard-working, inventive engineering professional with extensive knowledge and experience in high-speed, low-power ASIC design and verification. An innovative problem solver with 5 patents awarded. Proven track record on the development and delivery of quality products from concept to production.

Marty Perrigo's Current Company Details
Tactical Computing Laboratories

Tactical Computing Laboratories

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Senior Principal Research Engineer
New York, NY, US
Website:
tactcomplabs.com
Employees:
13
Marty Perrigo Work Experience Details
  • Tactical Computing Laboratories
    Senior Principal Research Engineer
    Tactical Computing Laboratories
    New York, Ny, Us
  • Emu Solutions
    Member Technical Staff
    Emu Solutions Jul 2016 - Present
    System and hardware architecture, hardware development, FPGA development
  • Emu Solutions
    Consultant
    Emu Solutions Mar 2015 - Jun 2016
    System and hardware architecture, hardware development, FPGA development
  • Advanced Micro Devices
    Senior Asic/Layout Engineer
    Advanced Micro Devices Oct 2006 - Oct 2008
    Santa Clara, California, Us
    Transitioned to AMD through acquisition of ATI Research. Responsible for architecture, design and verification of Video Processing and Frame Rate Conversion (FRC) chips. Designed stream manager which handled all data streams passing through FRC chip (U.S. Patent Number 7,822,891). Provided integration support to about 5 different customers using our chip in their board designs. Performed characterization of chip over process, voltage and temperature. Supported firmware team to develop implementation for multiple customer applications.
  • Advanced Micro Devices
    Senior Engineer
    Advanced Micro Devices Dec 1998 - Oct 2006
    Santa Clara, California, Us
    Lead engineer from concept to design and implementation with the ability to find creative solutions to problems in areas of expertise. Designed and verified 128-bit SIMD/reduction DSP engine with instruction set tailored to video processing with support for streaming data types, with enhancements to the instruction set each generation. Designed and developed a new (0.18um 0.15um and 0.13um CMOS) 500MHz DLL with differential common self-bias current mode with low jitter control circuitry and automatic current range calibration for process and power supply variations (U.S. Patent Number 6,411,142 B1, and 6,903,586 B2). Designed and developed three new digital PLLs (0.18um 0.15um and 0.13um CMOS, input 33MHz/output 264MHZ, 528MHZ or 1056 MHz, input 400KHz/output 400MHz, input 2MHz/output 600MHz) with differential common self-bias current mode, with fast lockup/ low jitter circuitry and automatic current range calibration for process and power supply variations (U.S. Patent Numbers 6,646,512 B2, 6,859108 B2). Completed characterization of Memory Compiler generated memory designs using HSPICE and HSIM with followup testing in the lab.
  • Texas Instruments
    Engineer
    Texas Instruments 1990 - 1998
    Dallas, Tx, Us
    Design engineer Memory Products Division. Flash EPROM Memory design.Engineer in design, development, and integration of new concepts. Designed and developed custom circuitry for several 1, 2, and 4 megabit Flash EPROM, including a custom chip for Ford Motor company for use in their Powertrain Electronic Controller. Developed floorplans and implemented physical design of Flash EPROM chips. Maintained standard cell library for use in Flash EPROM designs. Led physical design effort with newly developed Mentor Graphics Universal Place and Route tool.
  • Ibm
    Intern
    Ibm May 1989 - Aug 1989
    Armonk, New York, Ny, Us
    Summer Internship at IBM in Burlington VT

Marty Perrigo Skills

Asic Integrated Circuit Design Soc Debugging Rtl Design Processors Verilog Ic Digital Signal Processors Logic Design Hardware Firmware Digital Tv Simulations Systemc Vhdl System Architecture Mpeg 4 H.264 Software Design Spyglass X86 High Level Synthesis Video Processing Digital Video Electronics Hardware Design Low Power Design

Marty Perrigo Education Details

  • Clarkson University
    Clarkson University
    Electrical Engineering

Frequently Asked Questions about Marty Perrigo

What company does Marty Perrigo work for?

Marty Perrigo works for Tactical Computing Laboratories

What is Marty Perrigo's role at the current company?

Marty Perrigo's current role is Senior Principal Research Engineer.

What is Marty Perrigo's email address?

Marty Perrigo's email address is mp****@****ogy.com

What is Marty Perrigo's direct phone number?

Marty Perrigo's direct phone number is +126775*****

What schools did Marty Perrigo attend?

Marty Perrigo attended Clarkson University.

What skills is Marty Perrigo known for?

Marty Perrigo has skills like Asic, Integrated Circuit Design, Soc, Debugging, Rtl Design, Processors, Verilog, Ic, Digital Signal Processors, Logic Design, Hardware, Firmware.

Who are Marty Perrigo's colleagues?

Marty Perrigo's colleagues are Chase Keller, Ryan Kabrick, Andrew Barth-Yi, Timothy Dysart, David Donofrio, Tina Schneider, Kae Suarez.

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