Matthew Meza
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Matthew Meza Email & Phone Number

Senior Design Engineer at Elevation Microsystems at Elevation Microsystems
Location: San Jose, California, United States 9 work roles 2 schools
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Current company
Role
Senior Design Engineer at Elevation Microsystems
Location
San Jose, California, United States
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Who is Matthew Meza? Overview

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Matthew Meza is listed as Senior Design Engineer at Elevation Microsystems at Elevation Microsystems, a with 11 employees, based in San Jose, California, United States. AeroLeads shows a matched LinkedIn profile for Matthew Meza.

Matthew Meza previously worked as Senior Design Engineer at Elevation Microsystems and Analog Mixed Signal IC Design Engineer at Google. Matthew Meza holds Master’S Degree, Analog Integrated Circuit Design from Stanford University.

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Elevation Microsystems

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About Matthew Meza

Matthew Meza is a Senior Design Engineer at Elevation Microsystems at Elevation Microsystems.

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Elevation Microsystems
Elevation Microsystems
Senior Design Engineer at Elevation Microsystems
Website
Employees
11
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9 roles

Matthew Meza work experience

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Senior Design Engineer

Current

Campbell, California, United States

Jun 2023 - Present

Analog Mixed Signal Ic Design Engineer

San Francisco Bay Area

Feb 2022 - Jan 2023

Ic Design Engineer

• System level and architecture of step-up converters and multi-string LED drivers. • Design of core analog blocks such as bandgaps, LDOs, oscillators, charge pumps, current-sense amplifier, comparators, bias-generators, op-amps, and dynamic current sinks. • Created test modes for verification of analog blocks. • Layout techniques for matching, thermal gradients, and latch-up prevention. • Proficient in industry tools including Cadence, LTspice, MATLAB, and Python.

Jul 2018 - Jan 2022

Ee Course Assistant

Palo Alto

Course Assistant for E40M, E40A/B, and OSPKYOTO 40MCA E40M/A/B: Instruct students on how to use lab equipment and debugging practices.OSPKYOTO 40M: Taught E40M abroad in Kyoto. Class consisted of lectures with weekly labs.

Sep 2016 - Jun 2018

Design Engineering Intern

Designed an input disconnect system for synchronous and non-synchronous monolithic boost converters.

Jun 2017 - Sep 2017

Design Engineering Intern

Milpitas, California

Built and compensated several boost and SEPIC applications using unreleased switching regulators to characterize their transient response to loads, efficiency, and quiescent current in several different operating modes.Started a design of a dual version of a released part.

Jul 2016 - Sep 2016

Electronics Designer

Designed electronic circuits for competitive automotive applications such as controllers, daughter-boards for aftermarket ECU’s, and embedded systems for consumer use. Responsibilities include data acquisition, testing, and troubleshooting engine electronics, alternators, alternator voltage regulators, vehicle sensors, and chassis dynamometer modules.Design Projects include:A small and portable embedded system to test multiple vehicle sensors.A dual-alternator load balancer for competitive trophy trucks.A reference/synchronous circuit for sensor redundancy.

Jun 2015 - Jul 2016

Undergraduate Research Assistant

Under R. Jacob Baker, assist in research projects dealing with Delta-Sigma modulators, PCB design for chip testing, FPGA’s, Thermo-electric coolers/controllers, peltier devices, avalanche photo diodes, power electronics, and pulsed power circuits using silicon-carbide MOSFETs. Coauthor of IEEE paper: "An FPGA Based Passive K-Delta-1-Sigma Modulator".Worked on characterizing devices in IBM/Global Foundries 130nm SiGe for high speed trans-impedance amplifiers, optoelectronics, and dynamic CMOS circuits. Designed and laid out several Avalanche Photo-Diodes test structures and Trans-Impedance Amplifiers in GF8HP process.

Jan 2015 - Jul 2016

Electro-Magnetics Engineer Intern

University Of Nevada Las Vegas

Tested and commercialized the EM-Dot; an electromagnetic sensor.Built and designed test stands for the EM-Dot.Managed data acquisition, data processing and analysis .Wrote a complete MATLAB program for customer use in processing EM-Dot data.Data acquisition, data processing, data analysis, Matlab programming, test stand designer/builder, product demonstrator, researcher.

Sep 2013 - Jan 2015
2 education records

Matthew Meza education

Bachelor'S Degree, Electrical And Electronics Engineering, Senior

Activities and Societies: President of Practical Electronics, Tau Beta Pi Honor Society member, IEEE member, National Society of Hispanic.

FAQ

Frequently asked questions about Matthew Meza

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What company does Matthew Meza work for?

Matthew Meza works for Elevation Microsystems.

What is Matthew Meza's role at Elevation Microsystems?

Matthew Meza is listed as Senior Design Engineer at Elevation Microsystems at Elevation Microsystems.

Where is Matthew Meza based?

Matthew Meza is based in San Jose, California, United States while working with Elevation Microsystems.

What companies has Matthew Meza worked for?

Matthew Meza has worked for Elevation Microsystems, Google, Analog Devices, Stanford University, and Linear Technology.

How can I contact Matthew Meza?

You can use AeroLeads to view verified contact signals for Matthew Meza at Elevation Microsystems, including work email, phone, and LinkedIn data when available.

What schools did Matthew Meza attend?

Matthew Meza holds Master’S Degree, Analog Integrated Circuit Design from Stanford University.

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