Develop custom state-of-the-art digital signal processing platform; including system requirements, schematic capture, and Xilinx FPGA design/development.Design and implement digital components for FPGAs: interfaces for serial communication (I2C, SPI, etc.); GTX gigabit transceiver controller; DDR3 MIG-based controller; DAC/ADC.Experience in the full range of FPGA development: custom logic designs, simulations, debugging with ILA/Chipscope, tool automation, and timing closure.Experience in using Xilinx High Level Synthesis, which uses C code to implement RTL. Migrated a software algorithm, which took 1.3 million clock cycles to complete, to RTL which completes the same algorithm in ~4500 clock cycles.Experience in multiple levels of debugging and troubleshooting, from embedded software to FPGAs to electronic components, with experience using ILA/Chipscope, oscilloscopes, network analyzers and spectrum analyzers.Develop new methods to simulate high fidelity time-variant RF Signal models using digital filtering techniques.Ownership of an FPGA design, digital signal processing pipeline, antenna model simulation and subversion repository.Work directly with the customer to provide update and obtain requirements and feedback.Received multiple awards for customer satisfaction from Northrop Grumman and from our customer the Air Force Research Laboratory.

Developed interface to and control of laboratory test equipment.C++ Software programming and debugging.

Aided in research of hardware based Java bytecode processing.Used VHDL to design a garbage collector and memory interface for a FPGA based Java bytecode engine.Developed an implementation, in Java, of the dhrystone benchmark to evaluate an FPGA based Java bytecode engine.

Assistant to a production floor engineer.Assembled and soldered electronics.

Tested prototype electronic power steering devices.Aided development of a platform which would integrate multiple laboratory equipment into a single automated testing platform.