Matteo Vit

Matteo Vit Email and Phone Number

Director / Principal Design Engineer at Starware Design @ Starware Design Limited
cambridge, cambridgeshire, united kingdom
Matteo Vit's Location
Greater Cambridge Area, United Kingdom
Matteo Vit's Contact Details

Matteo Vit work email

Matteo Vit personal email

About Matteo Vit

I am an electronics engineer with over a 20 years of work experience in a variety of markets: from high performance computing to industrial, from home automation to automotive, from defence to power electronics.After working for several companies ranging from start-up to big multinational, I have decided to set up my own company, Starware Design, to offer my expertise to Clients seeking design and consulting services for cutting edge technologies.I have a track record of technology innovation (co-author of 5 patents, hackaton winner) plus new processes/methodologies introduction.I work comfortably in roles ranging from architect/technical leadership to more hands-on/detailed design. My specialities are:- embedded systems architecture design- ASIC/FPGA design and verification- embedded Linux and Zephyr- AI/ML- hardware design (high speed schematic and layout)- project leading / project management- multidisciplinary projects (combination of hardware, FPGA, software and mechanical)Member of the IoT Security Foundation

Matteo Vit's Current Company Details
Starware Design Limited

Starware Design Limited

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Director / Principal Design Engineer at Starware Design
cambridge, cambridgeshire, united kingdom
Employees:
1
Matteo Vit Work Experience Details
  • Starware Design Limited
    Director / Principal Design Engineer
    Starware Design Limited May 2014 - Present
    Cambridge, United Kingdom
    ASIC/FPGA design and verification (Xilinx and Altera; ISE/Vivado and Quartus; verification with UVVM, Cototb; QEMU-FPGA co-simulation, AI accelerators). Devops for FPGA.AI architecture design for RTL implementation.Hardware design (FPGAs, microprocessors/microcontrollers, digital video I/Os, mixed-signals (ADCs, DACs), switching DC/DCs, FMC boards, high speed (PCIe, DDRx)).Linux device drivers.Yocto customisation (new packages, patches, etc) and integration with CI.Zephyr.Test systems design and implementation (Python/RobotFramework, NI VISA instruments integration, PyQT GUI).Member of the IoT Security Foundation.
  • Cambridge Touch Technologies Ltd
    Engineering Director
    Cambridge Touch Technologies Ltd Jun 2017 - Jul 2018
    Cambridge, United Kingdom
    Technology development and creation of demos for potential clients/partners or tradeshows.Development of Innovative algorithms (mainly Numpy).Creation of a multi-disciplinary engineering team (electronics, FPGA, DSP and Android system/apps).Technical authority and technical lead for the engineering team.Design and code reviews.Mentoring of junior engineers.
  • Amantys Ltd
    Senior Design Engineer
    Amantys Ltd Aug 2011 - May 2014
    Cambridge, United Kingdom
    Technical authority for FPGA and digital hardware development.New technologies and processes champion (i.e. adoption of SystemVerilog/UVM, Altium integration with company database, continuous integration for FPGA development, etc).Interim project manager (multiple projects, team size up to 6 engineers).FPGA design and verification (Xilinx and Lattice). Embedded system design (Altium). U-boot and Linux hacking.Bespoke communication protocol design and implementation.End of line test system design and implementation (Python/RobotFramework).Co-author of 4 patents.
  • Altran Italia S.P.A.
    Aerospace & Defense Consultant
    Altran Italia S.P.A. Feb 2010 - Jul 2011
    Systems engineer and WBE responsible at Selex Galileo.
  • Selex Galileo
    Systems Engineer
    Selex Galileo Feb 2010 - Jul 2011
    Systems engineer. In charge of various flight simulator WBEs. Defining and designing sub-systems and architecture for simulation system either in the concept or the development phase. Leading the technical and engineering activities required by the specific role. Reviewing the sub-system designs and current architecture choices, documenting the agreed interfaces and all associated activities.Activities scheduling (using Microsoft Project).System modelling with Matlab/Simulink/Stateflow. Sound and communications model development with ASTi tools.Writing technical documentation compliant with MIL-STD-498.
  • Dave Embedded Systems
    Project Leader, Systems Architect And Systems Engineer
    Dave Embedded Systems Mar 2009 - Feb 2010
    Project leader for: a vehicle tracking and safety system, a ticket vending machine, home automation project. Development of system level designs from customer proposals. Project reviews. System qualification prior to production sign off. Systems design (mechanical, electronic, electrical, software). 2D and 3D mechanical design. Cabling harness design. Technical support. Internal and outsourced resources coordination.
  • Dave Embedded Systems
    R&D Engineer
    Dave Embedded Systems Sep 2006 - Feb 2010
    FPGA design with VHDL and Verilog (Xilinx Virtex4 and Lattice XP2). Embedded system design with PPC, ARM, AVR32 and x86 processor. Linux device driver programming. Bootloader hacking (u-boot). Schematic entry. SoC design. Real-time video application with AVR32 (http://www.dave.eu/index.php?page=3#CS1). Student mentoring (BSEE thesis of M. Geromin “Embedded system design on FPGA with 2D hardware acceleration”, http://www2.units.it/ingeln/tesi/2009/video_hw_accelerator_on_fpga.ppt).
  • Eurotech
    Hpc Specialist And Lead Developer
    Eurotech Sep 2005 - Aug 2006
    Cluster installation, hardware configuration, software installation and customization. Tuning, testing and benchmarking. Customer support (remote and on site). Diskless and live cd solutions development. Consultant coordination. PLC-based automation system design. Rack power distribution unit design. One cluster rated at Top500 (http://www.top500.org/system/8112).
  • Eurotech
    Hpc Intern
    Eurotech Oct 2004 - Jun 2005
    FPGA remote update systems design. Digital design with VHDL and Quartus II from Altera. Altera Nios II peripheral design and its device driver. PCI-X core interfacing. C and Perl programming. USB interfacing with FTDI devices. Linux low level application developing.

Matteo Vit Skills

Embedded Systems Fpga Vhdl Electronics Arm C Device Drivers Embedded Linux Linux Verilog Soc Testing Xilinx Hardware Architecture Microcontrollers Hardware Simulations System Architecture Linux Kernel Embedded Software Integrated Circuit Design Firmware System Design Systems Design Project Coordination Jtag Digital Signal Processors Field Programmable Gate Arrays Arm Architecture Hardware Design Bash Usb Embedded C X86 Altera Software Design System On A Chip Device Drivers Systems Engineering Team Leadership Debugging Rtl Design High Performance Computing Ethernet Powerpc Edk Modelsim I2c Tcp/ip Pcie

Matteo Vit Education Details

Frequently Asked Questions about Matteo Vit

What company does Matteo Vit work for?

Matteo Vit works for Starware Design Limited

What is Matteo Vit's role at the current company?

Matteo Vit's current role is Director / Principal Design Engineer at Starware Design.

What is Matteo Vit's email address?

Matteo Vit's email address is vi****@****ail.com

What schools did Matteo Vit attend?

Matteo Vit attended Università Degli Studi Di Trieste, I.t.i. "a. Malignani" - Cervignano Del Friuli (Ud).

What are some of Matteo Vit's interests?

Matteo Vit has interest in New Technology, Project Management, Travelling, High Tech Market Analysis, Economics, Finance.

What skills is Matteo Vit known for?

Matteo Vit has skills like Embedded Systems, Fpga, Vhdl, Electronics, Arm, C, Device Drivers, Embedded Linux, Linux, Verilog, Soc, Testing.

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