Matthew Mustapic, M.Eng Email and Phone Number
Ontario Graduate Scholar / MEng 👨🏼🎓Programming Languages: Python, C++, SystemVerilog 👨🏼💻 Hardware & Software Design-Verification / Vehicle Modelling 🚘Well spoken in English, French, and Croatian 🗣
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Fpga Engineer IiCiena Sep 2021 - PresentOttawa, Ontario, Canada -
Research EngineerCharge - Centre For Hybrid Automotive Research And Green Energy Dec 2019 - Apr 2021Windsor, Ontario, Windsor🚗🔋 Regenerative Braking & Vehicle Power Electronics -
Research Assistant, Outstanding ScholarUniversity Of Windsor Sep 2017 - Apr 2020Windsor, Ontario📚Contributed To These PhD Research Projects:1️⃣ Electric Vehicle Drive Developement, Dr. Narayan Kar, 20172️⃣ Internet Of Things, Dr. Rashid Rashidzadeh, 20183️⃣ Intellectual Property Cores for FPGAs, under Dr. M. Khalid, 2019 -
Fpga EngineerCiena Sep 2019 - Dec 2019Ottawa, Ontario, Canada💻 FPGA Development and Implementation1️⃣ Implemented complex digital signal processing & control logic in RTL using System Verilog2️⃣ Conducted verification, coded testbenches, synthesis, and place & route with Vivado & Questa3️⃣ Developed communication interfaces with communication protocols (SPI, I2C, PCIe) 4️⃣ Verified RTL design at block level within UVM environment -
Hardware EngineerCiena Jan 2019 - Apr 2019Ottawa, Ontario, Canada🔌Hardware Sustaining And Development Of Optical Transport Circuit Packs1️⃣ Resolved electrical and optical field/factory related issues on 200G/400G OCLD line cards2️⃣ Prepared circuit analysis & simulations, and PCB documentation using OrCad/BoardViewer3️⃣ Determined root cause & corrective action for production failures at the circuit assembly level4️⃣ Optimized board design changes, and implemented engineering change notices (ECN) -
Production EngineerFca Fiat Chrysler Automobiles May 2018 - Aug 2018Windsor🚙 Assembly of the 2018 Chyrsler Pacifica and Dodge Grand Caravan1️⃣ Developed preventive maintenance procedures for micro-stoppage projects2️⃣ Improved work force efficiencies, cost effectiveness and customer satisfaction3️⃣ Provided an interface between the skilled trade crew and engineers4️⃣ Responsible for the supervision of a multi-trade crew that maintains testing equipment and building systems/assets
Matthew Mustapic, M.Eng Education Details
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Master Of Engineering - Meng -
Engineering
Frequently Asked Questions about Matthew Mustapic, M.Eng
What company does Matthew Mustapic, M.Eng work for?
Matthew Mustapic, M.Eng works for Ciena
What is Matthew Mustapic, M.Eng's role at the current company?
Matthew Mustapic, M.Eng's current role is FPGA Engineer at Ciena, Master of Engineering → I Bridge the Gap Between Hardware and Software.
What schools did Matthew Mustapic, M.Eng attend?
Matthew Mustapic, M.Eng attended University Of Windsor, University Of Windsor.
Who are Matthew Mustapic, M.Eng's colleagues?
Matthew Mustapic, M.Eng's colleagues are Vipin Patel, Sothy Phan, Ciaran Barr, Rajeev Anand, Miguel Calderon, Rashmi Yadav, Manish Bhagat.
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