Senior IC design manager with hands-on experience on high performance CPU and complex SOC designs including logic design, verification, DFT, physical design, STA, silicon bring-up, ATE test and production. In-depth knowledge of Design Automation, RTL, synthesis, scan/ATPG, MBIST, LBIST, JTAG, high-speed IO design and testing (USB, PCIE, Serdes, DDR,…), ATE and SLT flow. Good understanding on board and system level testing, foundry and supply chain management in semiconductor and networking industries. Strong people management experience as manager/Sr. manager.