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A seasoned semiconductor professional with over 10+ years of experience including 5+ years in the industry working on leading-edge transistor technology: FinFet and GAA R&D at Intel as a FEOL/MOL process integration engineer and cross-functional team leader focusing on yield improvement, performance and reliability enhancement, and ramping a technology node from R&D to HVM.· Extensive experience in process development and HVM in a fast-paced environment· Worked with large amount of data and engineers from various teams to identify, build models for, andresolve yield, performance, and reliability problems· Won Intel divisional awards for delivering new processes for improving DLY and PLYSome examples of my work: · Received Intel divisional awards for over 15X defect reduction and elimination of a systematic defect for Intel’s first Contact Over Active Gate (COAG) architecture· Used 𝗺𝗼𝗱𝗲𝗹-𝗯𝗮𝘀𝗲𝗱 𝗽𝗿𝗼𝗯𝗹𝗲𝗺 𝘀𝗼𝗹𝘃𝗶𝗻𝗴 and developed novel process flows to reduce data lead time for model validations and solution implementations· Based on 𝗿𝗼𝗼𝘁 𝗰𝗮𝘂𝘀𝗲 𝗮𝗻𝗮𝗹𝘆𝘀𝗶𝘀 (𝗥𝗖𝗔) to execute short-term fixes to allow continuous learning and qualify long-term process changes to address the underlying problems· Led 𝗻𝗲𝘄 𝗽𝗿𝗼𝗱𝘂𝗰𝘁 𝗶𝗻𝘁𝗿𝗼𝗱𝘂𝗰𝘁𝗶𝗼𝗻 (𝗡𝗣𝗜) through the responsible segments and made prompt changes based on incoming design and process changes and outgoing requirementsBeing able to learn and solve new problems with great teams is what I like about my job!Additionally, I enjoy sports, let it be playing a pick-up basketball game at a local park, joining an organized baseball practice with a group of friends, or attending a soccer game, I love them all! I enjoy meeting people, give me a shout at maigo.liu@gmail.com or just message me on LinkedIn.
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Foundry Product Yield And Process EngineerGoogleTaiwan -
Foundry Yield And Process EngineerGoogle Jan 2024 - PresentTaiwanGoogle’s Custom Silicon Operations-Engineering -
Staff Feol/Mol Integration Engineer (Intel 10Nm/Intel 7/Intel 14A)Intel Corporation Oct 2016 - Dec 2023Portland, Oregon AreaAdvanced FinFET and RibbonFET Technology Programs • Chaired cross-functional focus teams consisted of module, device, and yield engineers • Led task forces to drive swift responses to critical line issues and excursions• Planning and allocating resources for key projects to meet the program goals and timeline• Communicated status of on-going projects and future development items to senior management and program direction and feedback to the focus team for synchronizing effort… Show more Advanced FinFET and RibbonFET Technology Programs • Chaired cross-functional focus teams consisted of module, device, and yield engineers • Led task forces to drive swift responses to critical line issues and excursions• Planning and allocating resources for key projects to meet the program goals and timeline• Communicated status of on-going projects and future development items to senior management and program direction and feedback to the focus team for synchronizing effort and resources• Used model-based problem solving and made data-driven decisions to comprehend all aspects of yield and performance impacts for process changes and production line debug • Analyzed SPC parameters, inline defect data, and electrical device and yield data for monitoring production line health and identifying yield and performance opportunities• Coordinated and led NPI’s for testchips and products by establishing critical checkpoints to ensure process health• Worked with oversea high-volume manufacturing sites for process transfer and qualification plans Show less -
Senior Feol/Mol Integration EngineerIntel Corporation Oct 2016 - Apr 2020Portland, Oregon Area -
Graduate Research AssistantUniversity Of Illinois Urbana-Champaign Aug 2011 - Aug 2016Urbana-Champaign, Illinois AreaAdvisor: Prof. Milton FengDesign, Fabrication, and Characterization of high speed optoelectronic semiconductor devices for Datacom applications : Vertical Cavity Surface-Emitting Laser (VCSEL), Light-Emitting Transistor (LET), and Vertical Cavity Transistor Laser (VCTL)High Speed Vertical Cavity Surface-Emitting Laser (VCSEL) and Transistor Laser (VCTL) development for Datacom applications:• Developed and fabricated 40 and 57 Gb/s error-free 850 nm oxide-confined… Show more Advisor: Prof. Milton FengDesign, Fabrication, and Characterization of high speed optoelectronic semiconductor devices for Datacom applications : Vertical Cavity Surface-Emitting Laser (VCSEL), Light-Emitting Transistor (LET), and Vertical Cavity Transistor Laser (VCTL)High Speed Vertical Cavity Surface-Emitting Laser (VCSEL) and Transistor Laser (VCTL) development for Datacom applications:• Developed and fabricated 40 and 57 Gb/s error-free 850 nm oxide-confined VCSELs• High speed VCSEL device and array layout design and fabrication process development• Developed process for the first VCTL with oxide aperture for electrical and optical confinement• Fabricated the first VCTL with deposited SiO2/TiO2 DBR for reduced electrical power consumption• Electrical and optical DC and Microwave semiconductor device measurements • High speed VCSEL and VCTL material analysis and epi design Show less -
Teaching Assistant : Ece 447 Active Microwave Circuit LabUniversity Of Illinois At Urbana-Champaign Jan 2013 - May 2015Urbana-Champaign, Illinois AreaLab TA for ECE 447- Active Microwave Circuit Design by Professor Milton Feng. The TAs instructed students to build a microwave amplifier with self-made DC bias circuits and stub matching networks. We taught the students to measure the S-parameters of the transistors used in their amplifiers and build an circuit model in Keysight/Agilent Advanced Design System (ADS), and the amplifiers were built accordingly. We characterized the microwave characteristics of the amplifiers and their noise… Show more Lab TA for ECE 447- Active Microwave Circuit Design by Professor Milton Feng. The TAs instructed students to build a microwave amplifier with self-made DC bias circuits and stub matching networks. We taught the students to measure the S-parameters of the transistors used in their amplifiers and build an circuit model in Keysight/Agilent Advanced Design System (ADS), and the amplifiers were built accordingly. We characterized the microwave characteristics of the amplifiers and their noise performance. Show less -
Teaching Assistant: Ece 329 Eletromagnetics IUniversity Of Illinois At Urbana-Champaign Aug 2011 - Dec 2013Urbana-Champaign, Illinois Area
Michael Liu Education Details
Frequently Asked Questions about Michael Liu
What company does Michael Liu work for?
Michael Liu works for Google
What is Michael Liu's role at the current company?
Michael Liu's current role is Foundry Product Yield and Process Engineer.
What is Michael Liu's email address?
Michael Liu's email address is me****@****iuc.edu
What schools did Michael Liu attend?
Michael Liu attended University Of Illinois At Urbana-Champaign, University Of Illinois Urbana-Champaign, University Of Illinois At Urbana-Champaign.
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Michael Liu
Taipei–keelung Metropolitan Area
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