1. Characterized various Digital IO pads, including high-speed, low-speed interfaces, and DDR, through different current and voltage tests.2. Collaborated closely with IO designers to access IO test plans and coverage for different technology nodes and generations.3. Focused on improving yield loss/retest rate and reducing test time through programming methods.4. Created tools to increase team efficiency and reduce workload.

1. Conducted investigations into hardware product issues, focusing on material stability and yield improvements.2. Collaborated closely with the customer's test engineer to execute hardware requirements and optimize performance for a new chip, including signal integrity (SI), power integrity (PI), thermal evaluation, and layout.3. Assisted in problem-solving for mechanical and thermal issues during the initial bring-up of first High-Performance Computing (HPC) product.