Meng Peun Tan Email & Phone Number

Camas, Washington, United States

Owner of logic, SRAM, flash, EEPROM, and mixed-signal IC products across multiple technology nodes for numerous foundry customers with knowledge of automotive standards and familiarity in CMOS, BJT, LDMOS, and passive device engineering. Coordinate and report fab actions that address customer expectations and requests. • Serve as the technical lead of Fab11 New Tape-Out team. Conciliate customer’s tape-out requirements and TSMC offerings. Routinely creates process flow for new products as well as TSMC Cybershuttle.• Expanded fab's technology portfolio by creating and executing reliability qualification plans for new process options and IPs, thus securing numerous new product introductions and sources of revenue.• Participated in resource/capacity planning, milestone setting, process piloting, and performance matching for a technology transfer project aiming to help customer navigate supply chain geopolitical risks.• Helped a top TSMC customer to score a design win through customization of mask tapeout and execution of complex engineering corner-split plans.• Acted as project lead for product transfer that met customer’s aggressive schedule and successfully matched source fab's baseline yield on pilot lot.• Proposed, developed, qualified, and optimized a novel passivation scheme that satisfied customer’s downstream process requirements, thus enabling volume ramping of customer’s sensor product. • Resolved a yield issue working with customer’s design team to locate layouts susceptible to photolithography exposure energy marginality. Corrective actions were fanned out to other TSMC fabs.• Qualified green anti-reflection coating materials to ensure compliance with environmental standards while maintaining device characteristics baseline and product yield.• Improved extreme wafer edge yield due to contact open by qualifying and implementing a new process that reduced ILD CMP non-uniformity by 50%.

Hillsboro, Or

Develop, qualify, improve, and maintain bright-field wafer defect inspection tool in the Logic Technology Development organization. Assist in establishing equipment roadmap to address new technical challenges presented by progressively smaller technology nodes. Define and implement process control limits and procedures to ensure tool stability and cross-fab tool matching. Lead working groups with equipment vendor and manage vendor’s deliverables. • Participated in defect reduction activities for 14-nm, 10-nm, and 7-nm technology nodes in various development cycles. • Created robust wafer inspection recipes for various front and back end process steps using expertise in optics and image processing to significantly increase inline defect visibility.• Resolved a wide variety of tool issues including software bugs as well as faulty components by working closely with tool vendor. Improved inventory and documentation to shorten time waiting for replacement parts. As a result, tool uptime exceeds 95%.• Lead a cross-site team and coordinated transfer of module-specific process recipes, procedures, and learning to high volume manufacturing sites.

Urbana-Champaign, Illinois Area

Performed research activities on semiconductor optoelectronic devices in Professor Kent Choquette’s group ranging from design, modeling, fabrication, testing, to result publication and presentation.• Demonstrated single mode photonic crystal vertical-cavity surface-emitting lasers (VCSELs) capable of error-free data transmission over kilometer-long fiber links at high data rate (25 Gb/s) while operating at record-low current density. Reduced fabrication complexity by creating a self-aligned process.• Demonstrated a novel VCSEL modulation scheme with record-low switching power and record-high extinction ratio utilizing bias-controlled polarization switching enabled by anisotropic optical and current aperture design. Completed the project involving design, fabrication to testing in less than 4 months.• Assisted in optoelectronic device characterization for a cross-campus, multidisciplinary research project exploring non-invasive optogenetic applications to wirelessly control neural activities in living organisms.• Modeled filamentation and lateral mode stabilizing schemes suitable for mass production using the beam-propagation method in a project that successfully reduced catastrophic mirror damage in high-power semiconductor edge-emitting lasers, hence extending laser operating lifetime.

Urbana-Champaign, Illinois Area

Supervised lab sessions and demonstrated use of equipments to students for ECE 495 (Photonic Device Laboratory).

Hillsboro, Or

Studied and modeled optical multiplexer/demultiplexer in optical interconnects employing wavelength division multiplexing (WDM) for the Intel Components Research organization.• Transferred synthesized learning of device physics and simulation methods from extensive literature research to the employing organization.• Designed and modeled WDM devices as well as laser-to-waveguide coupling for new wavelengths using commercial FDTD and beam-propagation method (BPM) as well as self-developed semi-analytical simulation tools. Simulated devices were fabricated and showed behaviors as predicted by simulations.

Urbana-Champaign, Illinois Area

Supervised lab sessions and demonstrated use of equipments to students for ECE 495 (Photonic Device Laboratory). Also graded students' lab reports.

Urbana-Champaign, Illinois Area

Head teaching assistant for ECE 442 (Electronic Circuits) :• Held office hours to answer questions regarding lectures and homework assignments. • Prepared detailed homework solution sets and graded homework assignments.

Phd, Electrical Engineering, 4.00

Activities and Societies: IEEE Photonics Society

Ms, Electrical Engineering, 3.97

Activities and Societies: IEEE Photonics Society

Bs, Electrical Engineering, 3.86

Activities and Societies: Tau Beta Pi