Raj Menon Email and Phone Number
Raj Menon's Location
San Francisco Bay Area, United States, United States
Raj Menon's Contact Details
Raj Menon work email
- Valid
- Valid
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Raj Menon personal email
n/a
About Raj Menon
An engineer with a demonstrated history of solving complex hardware, software and systems problems. A person who loves to use a background in end-to-end product development to create innovative products and solutions to solve real world problems.
Raj Menon's Current Company Details
Raj Menon Work Experience Details
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Technical Staff, Hw Technologist, Office Of Isg CtoDell Technologies Oct 2024 - PresentRound Rock, Texas, Us
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Director Of System EngineeringSima.Ai Oct 2023 - Oct 2024San Jose, California, Us- Hands on Manager and Lead of a team of PCB, System, SI/PI and test/automation engineers- Responsible for all design, bringup, verification and NPI of multiple PCBs using the SiMa 2nd Generation ML/AI SoC (Bringup/DevKit, Characterization, Production Low Profile, SOM cards)- Assisted in SoC package development- Assisted customers with designing in ML/AI SoC into their boards- Assisted validation SiMa PCBs in partner systems -
Senior Principal EngineerSima.Ai Jan 2023 - Oct 2023San Jose, California, Us- Post-Silicon Validation: SoC and multiple PCBs- Assisted with LPDDR4 testing, link stability and test automation- Fixed PCB issues with SD-Card (root caused and found Linux Kernel Bug), eMMC (root caused and found FW issue), Ethernet (root caused PCB reset issue resulting in occasional link drop)
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Technical Lead/Manager - Compute HwArgo Ai Sep 2021 - Nov 2022Pittsburgh, Pennsylvania, Us- Technical Lead and Manager of a team responsible for ASIL-D automotive compute modules -
System Test Design LeadApple Jul 2019 - Sep 2021Cupertino, California, Us- Test Design Lead for entire Manufacturing Test Line for multiple high volume Mac computers -
Volunteer In PolicingRedwood City Police Department Apr 2019 - Jan 2020Redwood City, Ca, Us- Citizen Volunteer -
Reserve Police OfficerRedwood City Police Department Feb 2006 - Apr 2019Redwood City, Ca, Us- Reserve Police Officer - Patrol Division
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Principal EngineerAgylstor Aug 2018 - Jul 2019- System Design and Architecture for Edge Compute/Storage Appliance.- Investigate new technologies and see if/how they can be integrated into current and future products.- Assist in Board/System Bringup and Test.- Help solve HW/SW interface issues.- Python tests for incoming part validation and system qualification.
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Senior Staff Engineer, Platform HardwareTintri Feb 2017 - Jun 2018Santa Clara, California, Us- HW Lead for the storage subsystem for storage appliances. - Assist in debug of platform SW issues.- SAS and SATA SSD/HDD qualification and debugging. - Develop NVMoF proof-of-concept. - Develop new system architecture and present to the Office of the CTO. - GlusterFS protyping.- Intel SPDK, DPDK, PMDK and ISA-L proof-of-concepts and benchmarking. - Python scripts to automate testing and debug. -
Sw TechnologistHgst, A Western Digital Company May 2015 - Jan 2017San Jose, Ca, Us- Team lead for Manufacturing automation for SW installation, configuration and test. - HW System architecture for Rack Scale Hyperconverged system, help develop proof of concept. - HW System Architecture for scale-able NVMoF appliance. - HW System architecture for SWIFT and NFS/CIFS gateway appliances. -
Sw EngineerAmd Nov 2014 - May 2015Santa Clara, California, Us- Team lead for test software team.- Design and development of online, offline, manufacturing, RMA test SW. -
Member Of Technical Staff - Hardware Engineer/System ArchitectureNutanix Apr 2013 - Oct 2014San Jose, California, Us- System HW Design for multiple HyperConverged appliances.- SSD and HDD qualifications.- Deleloped and supported Python scripts for manufacturing team to test final products before shipment.- Help debug manufacturing and design issues. -
Member Of Technical Staff, HwRiverbed Technology May 2010 - Mar 2013San Francisco, California, Us- System HW Design.- Project Lead and Manager for WAN Optimization appliance.- SAS and SATA bus and protocol debugging. Hypertransport bus debugging.- Debug PCIe bandwidth issues. -
Principal Hw EngineerQlogic Jun 2006 - May 2010Aliso Viejo, Ca, Us- ASIC/Systems Engineering.- Bringup and validation of multiple ASICs and PCBs.- Pre and post silicon 5G and 10G SERDES testing and characterization.- Detailed Schematic and Layout reviews.- PCIe Gen2 bus/protocol debugging. -
Consulting Hw EngineerPmc-Sierra (Formerly Agilent) Aug 2005 - Jun 2006UsASIC DV on Palladium. -
Senior Embedded EngineerPathscale, Inc. May 2003 - Sep 2005- Diagnostics and Manufacturing Testing for Infiniband HCAs.- Hypertransport and Infiniband bus characterization.- HW/SW Co-Simulation.- 2.5G SERDES bringup and characterization.
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Consulting Embedded Engineer/Senior EngineerRaza Microelectronics (Formerly Sisilk Networks) May 2001 - May 2003- Diagnostics for switch fabric ASICs/PCBs.- Hardware Abstraction and Software Abstraction layers system software.
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Consulting Sw EngineerSynopsys May 2000 - Jul 2001Sunnyvale, California, Us- SW, Design Compiler extension to export constraints to IBM EinsTimer.- Physical Compiler extensions to extract RC information and back-annotate net delays for timing verification and optimization. -
Consulting Hw EngineerSun Microsystems Sep 1999 - Sep 2000Palo Alto, Ca, Us- HW, R&D Verification for cPCI Telco server. -
Consulting Embedded EngineerMcdata Dec 1997 - Jul 1999San Jose, Ca, Us- Diagnostics, Firmware for Fibre Channel Simulator Card.- Architecture Simulation SW for Fibre Channel Switches, Adapters, Clients, Servers. -
Consulting Manufacturing Test EngineerMedrad Jan 1995 - Oct 1997Pittsburgh, Pa, Us- Manufacturing Test Engineering for Medical Instruments - CT, MRI, Ultrasound Injectors. -
Sw EngineerAntaire Corporation May 1991 - Nov 1994- Nursing Home SW.- Financial SW (A/R, A/P, Inventory/Customer Management).- Automated Personnel Scheduling SW.
Raj Menon Skills
Asic
Device Drivers
Hardware
Compilers
Firmware
Systems Design And Engineering
Storage
Automation
Python
Embedded Systems
Sas
Nvmof
Nvme
Sata
Hdd
Ssd
Pcie
Infiniband
Manufacturing Tests
Hypertransport
Diagnostics
Protocol Analyzers/scopes/test Equipment
X86 Architecture
Raj Menon Education Details
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University Of PittsburghEe
Frequently Asked Questions about Raj Menon
What company does Raj Menon work for?
Raj Menon works for Dell Technologies
What is Raj Menon's role at the current company?
Raj Menon's current role is Technical Staff, Office of ISG CTO @ Dell Technologies.
What is Raj Menon's email address?
Raj Menon's email address is rm****@****tri.com
What schools did Raj Menon attend?
Raj Menon attended University Of Pittsburgh.
What skills is Raj Menon known for?
Raj Menon has skills like Asic, Device Drivers, Hardware, Compilers, Firmware, Systems Design And Engineering, Storage, Automation, Python, Embedded Systems, Sas, Nvmof.
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