Mohit Gupta Email and Phone Number

High Speed SerDes and Interfaces IP Cores Product Marketing and Management, Product Roadmap, IP definition, Sales and Business Development, Strategy, Customer Management

High Speed SerDes and Interfaces IP Cores Product Marketing and Management, Product Roadmap, IP definition, Sales and Business Development, Strategy, Customer Management

Led the ASIC IP function and various SoC/ASIC Projects for Large, Mid and Start-up companies both in public/private spaceLed the SerDes Center of Excellence Strategy for High End Networking Requirements (10G/28G/56G) Responsibilities include definition of the ASIC IP solution in Pre-sales, IP/Vendor selection Procurement, Risk assessment, Qualification, Integration and First level of Application Engineering SupportPartner actively with all IP vendors/Foundries in semiconductor market for their offeringsManaged a team of Experienced IP Application Engineers to support various programs and customers on daily basisDefine methodology for improvement of processes for successful IP Integration and IP benchmarking activities

Managed IP Global QA and AE teams for IOs, standard cells, Memory compilers(SRAM/RF) libraries across all nodes and platforms.Led a team of 5 experienced people involving Resource planning, decision making, strategic planning etc.Project Lead for design of chip Interfaces like FS-USB, High Speed LVDS and other specialty I/O's across 250-40nm technologies.Project Lead for Analog/IP Design Migration Methodology Development: Led a sub team of SoC design Migration team inside Infineon to migrate existing IP designs to other nodes/process variants with quick TAT. Led the team on Analog/IP part of migrations and explored vendor offerings in market(Mentor, Wipro, Sagantec, Cadence)/internal solution for the same with a test for USB2.0 from 90nm to 65nm.

Worked with various product line(wireline and wireless) teams from definition stage till the final implementation and successful results of multiple interface projects.Goal is to provide cost and area optimized solutions by using right set of interfaces and other IP components.Dealing with external and internal IP's. Plus responsibility as a Project Lead for various Interface Projects.Design and application engineering of crystal oscillator IO pads(on chip real time 32kHz and MHz clocks) for wireline/industrial/wireless chip products.

Worked on design of various high resolution DACs for multiple applications in CMOS 90nm LP Technology