Who is Mike Hutton? Overview
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Quick answer
Mike Hutton is listed as Semi Retired based in Mountain View, California, United States. AeroLeads shows a work email signal at intel.com, phone signal with area code 408, and a matched LinkedIn profile for Mike Hutton.
Mike Hutton previously worked as Technical Lead / Sr. Manager (L7) at Google and Technical Lead / Manager (L6) at Google. Mike Hutton holds Ph.D, Computer Science (Graph Theory, Cad, Fpga) from University Of Toronto.
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{first}.{last}@intel.com
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Profile bio
About Mike Hutton
Mike Hutton is a Semi Retired at . He possess expertise in debugging, embedded systems, circuit design, pcb design, hardware architecture and 38 more skills.
Listed skills include Debugging, Embedded Systems, Circuit Design, Pcb Design, and 39 others.
Current workplace
Mike Hutton's current company
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18 roles
Mike Hutton work experience
A career timeline built from the work history available for this profile.
Technical Lead / Sr. Manager (L7)
CurrentTechnical Lead for Accelerator Performance, Google Core-ML- ML (machine learning) accelerator architecture definition and analysis- Perf/TCO (total cost of operation) modeling, simulation of ML performance for accelerators- Power modeling, performance / throttling tradeoffs, datacenter deployment- Competitive analysis of internal and 3rd party hardware.
Oct 2021 - Present
Technical Lead / Manager (L6)
Performance and cost modeling and architecture for the Google Tensor Processor (TPU) machine learning ASIC/ASSP, leading a team of 10-15. Lead the performance simulator TF-Sim development, new-product pilots, power and other analysis.
Jun 2018 - Sep 2021
Principal Engineer, Director Fpga Architecture
Product Architect, IC Engineering, Intel Programmable Solutions Group (formerly Altera). Altera was acquired by Intel in December 2015.Responsible for FPGA fabric and interface architecture, managing a team of 11. Modeling and competitive analysis on FPGA performance and power, feature evaluation and definition, product specification and feature evaluation.
Jan 2016 - Jun 2018
Architect And Principal Engineer
Altera
Product Architect, IC Engineering - Defining next-generation programmable products.Individual contributor with ownership of performance and power analysis, SEU and Reliability architecture, device features and innovations. Principal Investigator, Office of the CTO - Strategic research
Sep 2013 - Dec 2015
Principal Design Engineer, Office Of The Cto
Altera
Strategic research for future-generation programmable fabric architecture.
Dec 2010 - Sep 2013
Director Of Hardware Architecture
Responsible for definition and modeling of Tabula's chip architecture including block and fabric definition, software model, chip assembly, timing and verification. Managed a team of 12 who implemented product architectural definition and implementation (Haskell, Java and Verilog), interaction with software, performance and power modeling and analysis.
Aug 2009 - Dec 2010
Principal Engineer
Altera
FPGA Architecture Definition, CAD algorithms (synthesis, P&R, timing analsis and other) and development in C++. Acted as individual contributor and manager. Inventor responsible for multiple patents. Academic contact with Universities, program committees and external research including managing external funding. Published more than 30 peer-reviewed.
Jul 2004 - Aug 2009
Sr. Member Of Technical Staff
Altera
FPGA Architecture and CAD
Jun 2000 - Jun 2004
Member Of Technical Staff
Altera
FPGA Architecture and CAD
Jul 1998 - Jun 2000
Sr. Software Engineer
Altera
FPGA Architecture and CAD
Jun 1997 - Jun 1998
Graduate Student / Lecturer
Graduate Student, Computer ScienceSuperivised by Derek Corneil and Jonathan Rose (ECE)Undergraduate Lecturer for 3 years
Sep 1990 - May 1997
Intern/Co-Op
Software development on a terminal emulation package for telephone switch debugging
Sep 1988 - Dec 1988
Jan 1988 - Apr 1988
May 1987 - Aug 1987
Sep 1986 - Dec 1986
Jan 1986 - Apr 1986
May 1985 - Aug 1985
3 education records
Mike Hutton education
Ph.D, Computer Science (Graph Theory, Cad, Fpga)
University Of Toronto
Mmath, Computer Science (Graph Theory)
University Of Waterloo
Bmath, Computer Science & Economics
University Of Waterloo
FAQ
Frequently asked questions about Mike Hutton
Quick answers generated from the profile data available on this page.
What is Mike Hutton's role at their current company?
Mike Hutton is listed as Semi Retired.
What is Mike Hutton's email address?
AeroLeads has found 1 work email signal at @intel.com for Mike Hutton.
What is Mike Hutton's phone number?
AeroLeads has found 1 phone signal(s) with area code 408 for Mike Hutton.
Where is Mike Hutton based?
Mike Hutton is based in Mountain View, California, United States.
What companies has Mike Hutton worked for?
Mike Hutton has worked for Google, Intel Corporation, Altera, Tabula, and University Of Toronto.
How can I contact Mike Hutton?
You can use AeroLeads to view verified contact signals for Mike Hutton, including work email, phone, and LinkedIn data when available.
What schools did Mike Hutton attend?
Mike Hutton holds Ph.D, Computer Science (Graph Theory, Cad, Fpga) from University Of Toronto.
What skills is Mike Hutton known for?
Mike Hutton is listed with skills including Debugging, Embedded Systems, Circuit Design, Pcb Design, Hardware Architecture, Agile Methodologies, Manufacturing, and Engineering.
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