Michael Erwin Email & Phone Number

Anaheim, CA, US

Palo Alto, California, US

• Refactored and maintained an HEVC video encoder software model in C++ for the design and testing of a hardware core to be used in a cell phone/tablet SoC.
• Created design and test flows for the HEVC video encoder core which was implemented using SystemC and High Level Synthesis (HLS) with the Forte/Cadence Cynthesizer product.
• Implemented firmware, test flows, and software modelling for an H.264/VP8 video encoder core.
• Designed, implemented, and maintained boot and control firmware and the development environment for frame rate conversion (FRC) cores used in Broadcom’s digital TV chips for 120Hz support. The FRC cores replaced the.
• Developed a GUI based emulation environment in MS Visual C++ MFC for testing, evaluating, and documenting the FRC firmware which made debugging and development much faster.
• Provided direct support to customers including on-site in Korea.

Santa Clara, California, US

• Designed, implemented, and maintained boot and control firmware and the development environment for frame rate conversion (FRC) chips used in 120Hz TVs which consisted of an enhanced mediaDSP video core containing.
• Enhanced and maintained a GUI test program (LTE) in TCL that was used to control the FRC chips through an I2C interface from a PC.

• Designed and implemented VSB/QAM digital demodulator driver software (SCD). Also developed a GUI test program (SCDGUI) in MS Visual C++ MFC which included an embedded PERL parser for scripting and remote operation.
• Designed and implemented firmware for a proprietary video processor core (mediaDSP) which contained multiple MIPS CPUs, DSP cores, and other dedicated support hardware. It was initially used in an MPEG encoder chip for.
• Developed MPEG audio/video MUX firmware for the mediaDSP core and maintained the MPEG audio encoder firmware.
• Enhanced and maintained a MIPS CPU boot loader/monitor (PMON) for use with the ATI video processor chips (Xilleon) designed for set-top boxes and televisions. Enhancements included support for new networking cards.
• Created RBK, a MIPS CPU boot kernel/operating system for running diagnostic programs on the Xilleon video processor chips. It consisted of processor initialization, exception handling, C run-time support, and a host.
• Created an extensible diagnostic framework for chip testing.

• Developed boot and control firmware for a DSP based 28800 baud modem which consisted of RS232 serial port, USB interface, and PCI card configurations.

• Developed Windows device drivers, development libraries, and production test software for video capture/overlay boards.
• Created a configuration control panel, diagnostic utility, and a help file for an ISDN terminal adapter reducing customer’s hardware and software problems.
• Designed and wrote various utilities including a Plug and Play ISA board enabler and Modem Commander, a user-friendly Windows configuration utility for modems.
• Developed and maintained setup and install software for modems including multiple Plug and Play, external, and PC Card models.

• Designed and implemented device drivers and support utilities for SCSI host adapters, IDE interfaces, serial ports, parallel ports, and processor accelerators for Commodore Amiga computers.
• Completed an application for a TV tuner board which included multiple user interfaces.
• Wrote image manipulation utilities for several 24-bit graphics boards.

• Conceived, developed, documented, and marketed Toolmaker, a user-interface designer/code generator program for Commodore Amiga computers. Successfully negotiated a contract with Commodore Business Machines Inc. and.
• Contracted with Commodore Business Machines Inc. to do software and hardware compatibility testing.

Boston, MA, US

• Resolved software trouble reports and rewrote data collection processing code for the control processor of the Integrated Radio Room (IRR), a Department of Defense project, in AN/UYK-20 assembly language.
• Developed support programs in Fortran on a DEC VAX 11/780 computer for a signal analysis project.