Michael Kirkpatrick Email & Phone Number

ASIC design engineer and implementation lead experienced in developing complex SoCs for the consumer, video imaging and other markets. Highly regarded team player, recognized for leadership, initiative, and ability to drive tasks to completion with accurate and reliable results. Proven ability to multi-task in a fast paced environment while maintaining high quality of results and meeting project deadlines.Experienced in all phases of physical design including RTL handoff, synthesis, floorplanning (regions/preplacement/pin optimization/congestion avoidance), hierarchical block bus/pin planning, clock tree synthesis, place and route, timing optimization, parasitic extraction, static timing analysis, timing closure, IR drop analysis, signal integrity checking/correction, logical equivalence checking, DFM compliance, physical verification and sign off.

Listed skills include Asic, Static Timing Analysis, Timing Closure, Soc, and 30 others.