Mike Ledford Email & Phone Number

United States

College Park, Md, Us

Randolph Afb, Tx, Us

Randolph Afb, Tx, Us

Responsible for overseeing the development, testing, and fielding of Electronic Warfare operational capabilities for combat platforms. Key responsibilities include: training and development, developmental test, operational test, electronic warfare fundamentals, personnel management, operational readiness, budget management, crisis response, mission execution

Eglin Air Force Base, Florida, Us

Serves as the Deputy Chief in the 350th Spectrum Warfare Wing's Commander's Action Group for the Wing Commander and senior staff; providing executive support, strategic advice, and critical-project support to the Commander. Responsible for assisting the commander in formulating strategy, developing senior leader messaging, shaping internal and external engagements, and accomplishing key projects that cross DoD, Air Force, Major Command, and mission partner organizational lines to advance electromagnetic spectrum operations.Key Responsibilities include: advisory and staff support, strategic planning, information and briefings, crisis management, special projects, liaison and communication, operational oversight, policy development, resource allocation, training and education, external engagements, strategic messaging

Wright-Patterson Afb, Oh, Us

Responsible for defining, designing, and managing NASIC's external web enterprise across multiple networks. Acted as the bridge between internal customers, external customers in the acquisition, intelligence and operational communities, and the development team, to ensure that the web projects align with NASIC's goals and deliver value to end-users. Key responsibilities include: product vision, requirement gathering, backlog management, user-centric focus, feature planning, user-story definition, sprint review, acceptance testing, risk mitigation, continuous communication, agile software development

Wright-Patterson Afb, Oh, Us

Responsible for organizing, planning and executing NASIC's first Technical Hackathon known as "". was an exciting, collaborative, time-bound event where 100 individuals from across the NASIC enterprise worked intensively in small teams to create innovative solutions to NASIC's most challenging and pressing challenges. Teams were cross-functional including UI/UX designers, programmers, and testers.The hackathon evolved into a semi-annual event where technical experts from across the enterprise applied technical solutions such as AI/ML algorithms, data science, scripting, web development, database design, etc. to accelerate scientific and technical intelligence analysis.Key responsibilities include: problem framing, event planning, logistics, participant engagement, sponsorship, judging panel, rules and guidelines, registration and check-in, schedule and timeline, technical support, mentoring, food and accommodations, event documentation, communication, prize distribution, feedback and evaluation, budget management, project management

Wright-Patterson Afb, Oh, Us

Designed and developed the first resupply request and tracking tactical mobile application for smartphones and tablets running Android operating system. Collaborated with tactical end-users and key stakeholders to ensure the application had an intuitive and visually appealing user interface while ensuring the secuirty of user data and sensitive information through encryption and security protocols.

San Diego, Ca, Us

· Created Perl script to enhance validation and documentation or System Verilog source code· Simulation Performance Analysis· Intern driving coherent bus protocol regression testing including debug and scripting of partial good multiprocessor model configurations.· Responsible for hardware acceleration debug and regression management as backup for a full-time employee close to a major delivery date.· Created and managed coherent bus protocol education videos by interviewing senior staff members.

Santa Clara, California, Us

Created Perl scripts to enhance post-silicon integration validation of a security engine IP into a next-generation System on a Chip (SoC). These scripts were used to convert focus tests, which test specific IP interactions, into formats that can be executed in a post-silicon environment. Executed and debugged these scripts through a simulation and emulation environment to verify their quality. Worked closely with the owners of a new validation tool to expand the tool’s capabilities. Tool needed to support validation of the integration of a security engine into a SoC design. My involvement consisted of writing low level FW to initialize memory and enhancing scripts to create correctly sized raw binary images used by memory. This task included debugging of low level FW, instruction trackers, log files, and configuration files.Ran and debugged a focus test dealing with power management of a security engine integrated into SoC. This consisted of cross-checking signals in a wave tracker with the source System Verilog file. This task included debugging of low level FW, referencing high-level architecture documents, and tracking through System Verilog-based test code to ensure correct functionality.Assisted in creating a Verification Test Plan for the integration of an updated security engine IP.Debugged System Verilog code for several checkers and scoreboards Project lead for integration of a post-silicon validation tool

San Jose, Ca, Us

Performed upgrading of engineering chassis prototypes of routers for multiple product lines that are currently being developed and tested. These upgrades included using an on-line prototype inventory management tool to assess the current status of each individual prototype, and applying the necessary modifications and software/firmware upgrades to address all know issues discovered to date with each prototype design. Component specific tools and programming pods were used to upgrade firmware in peripheral devices such as Voltage Sequencers and Monitors, and FPGA/CPLD devices. Additional programming devices were used to upgrade the BIOS software that serves as the foundation for the router's operation.Performed Design Verification Testing for the ASR1000-ESP200 prototype. This process included booting up the prototype and searching for errors and possible solutions on the PCB , running memory tests off of diags and using these tests to verify the signal integrity of the DDR3 SDRAM. The verification was done using probes from an oscilloscope, capturing the signals using the oscilloscope, and verifying several signal parameters with data given in datasheets. The signals I have captured and verified using datasheets include Clock, Data, Data Strobe, Address, etc. In addition, I verified the signal integrity of the read and write operations associated with the ECSR bus on several ASICs on the FP200 board design to include Astro (Mother board) and Yoda (Daughter board)

Assisted in designing circuits that would meet the criteria for zipper machines to work properly. Circuits were designed using both single and three phase lines. Circuits usually included a DC power source, circuit breakers, terminals, contactors, relays, electrical motors, transformers, etc. Took apart circuit boxes and tested the continuity of the circuit. Used a multimeter to measure voltage drops across circuit elements to make sure parts are still working. Also, used a multimeter to measure the resistance on parts. These methods were used to debug a circuit and look for shorts and other faults in the circuit. Once the fault was located, I made the necessary fixes and retested the voltage drops to make sure that the circuit element was receiving the correct amount of power. Electrical Schematic Drawing using 2D software called Draftsight. I drew electrical circuit schematics for zipper machines and panel layouts for these machines. These drawings were distributed to companies and employees operating these machines for future troubleshooting purposes. I was in charge of taking the hand drawn circuits and converting them into a computer drawing that can be massively distributed. Designed and Constructed New Machines to improve the assembly line for zippers. An infrared heater machine was created in order to speed up the drying process of zippers. Zippers are dyed and need an efficient way of drying without ruining the coat of the zipper. The infrared heater machine used a transformer along with heaters to perform this operation. This new design increased the number of zipper tapes allowed to be dried in one rotation by a significant amount. An inspection machine was also designed in order to check whether or not the zipper tape was of manufacturing satisfaction. This machine used a motor, sensors, and a programmable logic controller to detect whether or not the zipper was of manufacturing standards.

Master Of Engineering (Meng), Electrical And Electronics Engineering

Bachelor Of Science, Electrical Engineering

Bachelor Of Science, Computer Engineering