Mentors new product engineer hire on basic IC test fundamentals using ETS (Eagle Test System). Familiarization using the ETS shell and with focus provided on how to use the analog instrumentations for programming continuity test, leakage test, Icc, threshold test, LDO, Oscillator Frequency test. - Successfully qualified Allegro EEPROM IP/test chip at SMIC Wafer Fab as an alternate fab source. Met deliverables and provided consistent feedback to core team of data analytics for D0 yield vs achieved yield, Probe and Final Test results on each Rel Qual read points. Reliability stresses includes Data Retention, Endurance Cycle, HTOL/Operating Life, HTSL/Storage Life, and ELFR making sure no failures or serious degradation of performance after the stresses were applied. Drive test program implementation of off-state leakage test for checking gate oxide integrity of Allegro gate driver devices for customer complaint reduction initiatives.Support PAT (Part Average Testing) engineering efforts focus on data analysis to verify rejection of fliers and establish test limits by using IQR outlier detection.- Provided supporting data that probe yield issues have correlations to fab PCM parameters and their yield losses have associated cost to die, package, test, and engineering time as well to consequences on throughputs and deliveries which we can avoid if we characterize the process corners, voltage, and temperature (PVT) during product qualifications.

NPI new product introduction and mass production of multimode VCSEL Arrays for 3D sensor applications / facial recognition. Technical interface between development team and manufacturing (epi, FAB, Assembly, Test, WAT, Quality and Reliability) teams during product development, ramp-up and volume production phases with primary responsibility of achieving and sustaining product yield.• Identify manufacturing issues related to wafer fabrication, assembly, test and resolving them with support from cross functional team.• Works closely with test team for validating test and improved throughput by implementation of sample testing. Improved quality by part average testing and statistical limits. • Improved product yields through analysis of test parametric distributions and dependencies to process parameters.• Work with Reliability engineering to define product manufacturing qualification plans. Worked with Quality team to evaluate and disposition production materials and RMA.

for QUALCOMM Technologies, INC. San Diego, CAthru 22nd Century Technologies Inc (Staffing Agency)Work with cross functional engineering/program manager to systematically improve RMA debug/response time and develop various quality metrics for management consumption. Supported creation, bug reporting, enhancement to salesforce RMA tool and Qlikview Tool by understandingprocess flow and metrics. Created weekly and monthly RMA reports of trends, open/closure cycle time by subsystem, volume, DPPM. Worked with cross functional team for integration of ECID and O+ wafer map to salesforce RMA tool. Demonstrated understanding of RMA quality metrics.

(Qualcomm acquired Ikanos Communications formerly GlobespanVirata/Conexant)Supported new product introduction (NPI) of SoC and mixed-signal xDSL Broadband Access Devices from engagement to foundries for tape-outs and defining wafer splits, package assembly plan, product reliability qualifications, communicating with vendors, cross functional team collaboration, WS & FT ATE testing & test flows, first silicon characterization, system level test to ATE correlation. Sustained and improvement of yields and throughputs of NPI devices released to mass production.- Qualified and released 18 reliable and high performance products to high volume production, in addition to 4 test chips bring-up and validations.- Created and executed plans of product characterizations over PVT process, voltage and temperature.- Supported product (ESD, LU and HTOL) and package (Pre-Con, TCT, HTS, HAST, uHAST) reliability qualifications, meeting program management schedule.- Reported and isolated ESD qualification failures back to quality and design team, leading to product fixes.- Cross functional communication with design, firmware, test engineering, and quality teams implemented fixes and reduced DPPM and RMA.- Material procurements of wafers, package assembly, testing, and reliability hardwares for bring-up.- Utilized tools of ATE shmoo and pinmargin, Galaxy Examinator and dataPower for statistical test data analysis- identifying problematic test and feeding back to test and design engineer for fixes.- Implemented manufacturing continuous improvements including statistical bin limits, over-voltage screening, part average testing, and ECID (Electronic Chip Identification).- Utilized MFU mask field utilization for die orientation placement, gaining more dies on a wafer.- Demonstrated understanding of Quality tools, SPC, CPK, FMEA, Gage R & R and inspection tools and procedures.

Responsible for new device transfers, test program and test hardware releases both for final test and wafer sort. Low yield and QA rejects failure analysis thru utilization of various failure analysis techniques and debugging tools available from A5XX, Catalyst teradyne and Agilent 93K tester. Loadboard Debugging (from newly assembled loadboard) due to increase of capacity as requested by customer. Test Program Conversion from A540 to A580 Teradyne Tester. Release of Test Standard Operating Procedure for Production use.

11/1998 - 5/2000 Philips Semiconductor Calamba Philippines Sr. Test Product Engineer Accountable for yield tracking and disposition of low yield and qa problematic batches for CD Rom decoder and FM/AM front end devices of Philips Semiconductors and resolving ambiguous batches thru utilization of various failure analysis techniques and debugging tools available from A5XX and Catalyst Teradyne test system. Responsible for upkeep and repair of loadboard. Accountable for communication and coordination of test related issues to Product Group (Philips Business Lines), especially for transfer of new products and test programs. 12/1996 - 11/1998 Philips Semiconductor Kaohsiung Kaohsiung,Taiwan Test Product Engineer Test Product Engineer for Audio Power Amplifier I.C.'s and FM/AM receiver tested on LTX77.Test Product Engineer for Mixed Signal Devices tested on A575 and A565D teradyne test system, supports product from Philips Semiconductor Southampton UK and Philips Semicondcutor Hamburg Germany. Low yield analysis. Responsible for the maintenance of loadboards (SIF Standard Interface for FT) on the assign devices. Correlation of new product transfer. 10/1995 - 12/1996 Philips Semiconductor Philippines Philippines Test Product Engineer Assigned at Test Engineering Section, responsible for Product Qualificationand Verification - Start-up of IC division of Philips Semiconductor Philippines.Responsible for Product Correlation of CMOS LOGIC IC. Responsible for training of Final Test Operator and QA operator. Documentation and writing of test procedure. Product failure analysis including Bench Set-up..

Factory start-up of Final Testing Process of Linear and CMOS LOGIC IC's of Rohm Semiconductor (from Fukuoka, Japan). Responsible for the set-up of production testers and testbox which includes calibration, repair, debugging, and initial production evaluation. Conducts breakdown and preventive maintenance of production testers. Testbox (loadboard) debugging from newly assembled loadboard for testing standard Op-Amp I.C.'s and other Linear I.C.'s. Conduct test program conversion from old tester system to new tester system using Rohm homebrew ICT 1400, ICT2100 and ICT1800 testers. Participated in the company wide preparation for the ISO 9002 certification.