Michael Simcoe work email
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● RF & mmWave IC and Module Designer: FEMs, PAs, Doherty, LNAs, Switches, Antennas● Lead IC product design with first-pass design success; hands-on silicon-proven design● Seasoned technical leader: 20 years experience in design and managing teams from productconcept to volume production● Excellent communication skills working across diverse teams, presenting succinct technicalsummaries to senior leadership and customers
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Senior Engineering Design ManagerQorvo, Inc. Dec 2020 - PresentOo● High Performance Analog, Infrastructure & WiFi Team● Designs supported: 3.4-3.8G 8W Doherty PA Module with novel thermal management;3.4-4G 10W Doherty PA Module with 500MHz DPD BW; 2W FEM WiFi PA inHBT/GaN/Laminate with novel Doherty structure and integrated thermal tracking● Developed RF + Electrothermal design flow for FEMs in HBT/GaN/Laminate● Full 3D EM design flow in FEM/HFSS: unified simulation of laminate, packaging, bondwires, SMDs, IPDs, ICs with mixed HBT/GaN/Laminate technologies● Developed behavioral model flow using extracted modulated model data and polynomialfitting that enabled fast analysis of FEM performance at the system level using Simulink● Created automated measurement data extraction scripts in Matlab, AEL, and Unix shell -
Rf & Mmwave Design Methodology EngineerGlobalfoundries Jul 2017 - Dec 2020Malta, Ny, Us● Created reference designs and flows across multiple advanced technology nodes (FDSOI,FinFET) showcasing technology capabilities at the block level (PA, LNA, Switch)● Designed a 6GHz WiFi stacked differential PA with record FDSOI Psat 28dBm hitting allcritical EVM linearity targets for 802.11ax using 22nm 22FDX● Designed a 28GHz LNA with record 1.4dB noise figure, 28dB gain in 12nm FinFET (12LP)● RF Module FEM design: PA and Switch (22FDX) with LNA (12LP) integrated into a FrontEnd Module (FEM) using Virtuoso RF SiP tool. Silicon interposer; BGA; laminate● Developed an automated design tool in Skill, Matlab, Python that instantiates parametricdevices and modifies CDF, including layout/LVS/PEX, with automatic data post-processing● Developed a new design automation tool that migrates/ports designs across nodesautomatically, including schematic, device sizing, simulation, layout, PEX, and LVS● Developed an improved fill methodology that reduced RF passive loss up to 40%● Managed relationships with all major electromagnetic tool EDA vendors (EMX, Keysight,Ansys, etc), including new electromagnetic tool validation scripts in Matlab, Python -
Rfic Designer And ManagerInfineon Technologies Jul 2010 - Jul 2017Neubiberg, München, De● Principal developer of new RFIC technology platform, responsible for development andplatform integration, including passives, active cells, and PDK creation● Design of high-power multistage high-gain (>30dB), wideband (1.8-2.2GHz) RFIC leadproducts in LD10 platform with first-pass success: PTMC21040 2x20; PTMC21060 2x30Wsymmetric; PTMC21061 20W+40W asymmetric (Doherty); PTMC21080 2x40W● GaN product design and optimization for 5G, including 3.5GHz and 4.5GHz multi-stage GaNMMIC designs using GaN PDK (Cree, Wolfspeed)● Design of parts across multiple technology platforms: LD9/LD9LF/LD50/LD10/LD11/LD12● Development of new LDMOS technology platforms from the beginning including all aspectsof process, design flow, PDK, and qualification (LD10IC, LDH1IC 50V)● Development of IC process passives, including the LD12IC high-Q IPD platform● Packaging, assembly, die and wire bond design using 2D, 3D electromagnetic simulationtools, capturing parasitic effects and coupling for multiple packaging options (QFN, MCM)● Large signal modeling, harmonic balance, stability, and electromagnetic analysis (ADS,Momentum, EMPRO, HFSS); layout, LVS, DRC; die option and wire bond planning; DOEstrategies; pizza mask; staging wafers; corner lots; load pull evaluation and optimizationmethodology; tuning/optimization; production testing and yield● Created automated Matlab scripts to process RF measurement data, extract criticalparameters, and summarize performance into Powerpoint and Excel documents● Established new methodologies to decrease design cycle time and maximized design reuse● Interfaced with Test Engineering in defining tests and limits for product qualification, yieldimprovements and test time reduction on the ICs● Collaborated with Applications Team and customers to understand line-up requirements andtranslate them into technical specifications for the IC development teams; portfolio planning -
Rfic Design EngineerFreescale Semiconductor Sep 2007 - Jul 2010Austin, Texas, Us● Complete RFIC design cycle experience of power amplifiers● Design specification/targets compliance doc and simulation (ADS, Momentum, HFSS)● Process Design Kit, S-parameters, large signal modeling, harmonic balance, stability● Layout (die/reticle); DRC, LVS; thermal tracking circuits; ESD placement● Packaging, die and wire bond; die option and DOE strategies● Electromagnetic simulation, optimization, extraction of IC process passives and packageparastics using electromagnetic tools (HFSS, Momentum)● Power amplifier tuning and load pull design methodology; design tuning/optimization andperformance trade-offs; characterization, production testing, and yield● Successfully designed a best-in-class Class F 47W, 800MHz IC with internal matching andharmonic tuning for target GSM/EDGE applications (MRFE6S8046)● Successfully designed a 140W, 2GHz ceramic (air-cavity) device for target WCDMADoherty applications (MRF8S21140, HV8 platform)● Doherty design, implementation, tuning, and DPD correction● Design of industry leading power amplifiers in major operating bands -
Senior Electrical EngineerMotorola Jan 2006 - Sep 2007Chicago, Illinois, Us● Complete antenna design cycle responsibility, including full RF CAD simulation usingAnsoft HFSS and XFDTD (bandwidth, efficiency, radiation pattern, diversity, SAR)● Antenna design and placement for optimal bandwidth, efficiency, SAR; IFA, PIFA, FJA,designs; diversity antenna; antenna tuning and optimization of PCB matching networks● Prototype fabrication and measurement: S-parameters, efficiency, radiation pattern, TRP, TIS● Design of complete multi antenna solutions: stamped, flex, multiband PIFA, GPS, WLAN● Antenna anechoic chamber measurements; SATIMO certified -
Antenna Design EngineerAmphenol Rf Dec 2004 - Jan 2006Danbury, Connecticut, UsDesign, fabrication, and testing of antennas including metal stamped or flex multiband PIFA, GPS, WLANAntenna anechoic chamber measurements; SATIMO certified
Michael Simcoe Skills
Michael Simcoe Education Details
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University Of TorontoElectrical Engineering -
University Of TorontoMasters In Electromagnetics
Frequently Asked Questions about Michael Simcoe
What company does Michael Simcoe work for?
Michael Simcoe works for Qorvo, Inc.
What is Michael Simcoe's role at the current company?
Michael Simcoe's current role is Senior Engineering Design Manager.
What is Michael Simcoe's email address?
Michael Simcoe's email address is mi****@****ail.com
What schools did Michael Simcoe attend?
Michael Simcoe attended University Of Toronto, University Of Toronto.
What skills is Michael Simcoe known for?
Michael Simcoe has skills like Ic, Agilent Ads, Analog, Rf, Circuit Design, Semiconductors, Analog Circuit Design, Rf Engineering, Network Analyzer, Spectrum Analyzer, Mixed Signal, Pcb Design.
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