Design Engineering Director
CurrentLeading PCIe Gen 5 serdes development team
Oct 2022 - Present
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Michael Venditti Email & Phone Number
Analog/Mixed-Signal Designer and Technical Leader/Manager with experience in block level design, subsystem feasibility/architecture, and technical leadership and mentoring of SERDES development teams.
at
Cadence Design Systems
1 work email found
@cadence.com
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Role
Analog/Mixed-Signal Designer and Technical Leader/Manager with experience in block level design, subsystem feasibility/architecture, and technical leadership and mentoring of SERDES development teams.
Location
Montreal, Quebec, Canada
Who is Michael Venditti? Overview
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Michael Venditti is listed as Analog/Mixed-Signal Designer and Technical Leader/Manager with experience in block level design, subsystem feasibility/architecture, and technical leadership and mentoring of SERDES development teams. at Cadence Design Systems, based in Montreal, Quebec, Canada. AeroLeads shows a work email signal at cadence.com and a matched LinkedIn profile for Michael Venditti.
Michael Venditti previously worked as Design Engineering Director at Cadence Design Systems and Senior Principal Design Engineer, High Performance PHY Group at Cadence Design Systems. Michael Venditti holds Ph.D, Electrical Engineering from Mcgill University.
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Profile bio
About Michael Venditti
Analog/Mixed-Signal Designer and Technical Leader/Manager with experience in block level design, subsystem feasibility/architecture, and technical leadership and mentoring of SERDES development teams. Experience in lab testing/debug and characterization of complete multi-domain (analog/digital) SERDES IPs. Strong communicator with experience interacting with internal and BU executives and external customers and fab houses.
Listed skills include Mixed Signal, Ic, Cmos, Asic, and 31 others.
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11 roles
Michael Venditti work experience
A career timeline built from the work history available for this profile.
Senior Principal Design Engineer, High Performance Phy Group
Nov 2021 - Oct 2022
Technical Staff Engineer - Analog Design, Mixed Signal Design Group (Advanced Engineering Services)
Technical/Project Lead for 25.6Gb/s OpenCapi/OIF-28G-MR SERDES macro in 16ffc process. * Included selective porting and design/architecture modification (serializer/transmitter, ADC, clocking) of legacy 28nm IP and new architecting for select subsystems (RX AFE)* Interactions with internal BU units (technical + schedule) and with lead customer (technical)*.
Nov 2017 - Nov 2021
Senior Principal Design Engineer, High Performance Phy Group
Development of 16ff test structures chip for assessing matching characteristics of resistor and MOS arrays and ESD TLP structures* Included design, testing/characterization, and preparation of characterization reportAnalog technical lead for 10G GPON/EPON OLT SERDES development in 28nm* Included 3.3V-tolerant burst-mode receiver IO and ESD.
Mar 2013 - Nov 2017
Team Lead, Mixed Signal Design
Led working group on 28nm technology infrastructure bring-upTechnical lead for general purpose and high-performance standard cell libraries and SERDES component reuse library in 28nmAnalog lead for 12G SAS/6G SATA/PCIe Gen 3 SERDES in 28nmESD protection consulting for SERDES designs (various process nodes)
Oct 2011 - Mar 2013
Senior Mixed-Signal Design Engineer
Feasibility/architecture for high-swing (1.8Vpp) voltage mode transmitter for SAS2 in 40nmDesigned PFD, CP, VCO, and complete PLL for PCIe Gen 3/2/1 applications in 40nmDesigned serializer and voltage mode transmitter for 10.3125 Gb/s GPON/EPON in 40nm. * IP served as reference design for other developments (12Gb/s SAS, 12.5 Gb/s OTN)Architect and analog.
Mar 2008 - Oct 2011
Mixed Signal Design Engineer
Designed 6 GHz clock phase generator IP using actively-peaked CML in 0.13umContributed to 3Gb/s SAS/SATA CML transmitter design in 0.13umDesigned 3Gb/s SAS/SATA voltage mode transmitter in 0.13um. * Included novel (patented) architecture for efficient FIR EQDesigner for top-level macro of dual-band 802.11 radio chip in 0.18um. * Included an aggregation of.
Sep 2002 - Mar 2008
Faculty Lecturer
Taught undergraduate introductory course in microelectronic circuits.
Sep 2000 - Dec 2000
Mixed Signal Design Engineer (Co-Op)
Designed transmitter/receiver circuits for large-scale free-space optoelectronic-VLSI ASIC.
Sep 1999 - Dec 1999
System Engineer (Co-Op)
Designed, tested, and characterized Gb/s point-to-point discrete free-space optical interconnects.
Sep 1997 - Dec 1997
Program Manager (Internship)
Four month internship in program management group (Microsoft Word).
May 1994 - Aug 1994
5 education records
Michael Venditti education
Ph.D, Electrical Engineering
Mcgill University
M.Eng., Electrical Engineering
Mcgill University
Bachelor Of Engineering - B.Eng., Electrical Engineering
Mcgill University
Dec, Pure And Applied Science
Cegep - John Abbott College
High School Diploma
Loyola High School Of Montreal
FAQ
Frequently asked questions about Michael Venditti
Quick answers generated from the profile data available on this page.
What company does Michael Venditti work for?
Michael Venditti works for Cadence Design Systems.
What is Michael Venditti's role at Cadence Design Systems?
Michael Venditti is listed as Analog/Mixed-Signal Designer and Technical Leader/Manager with experience in block level design, subsystem feasibility/architecture, and technical leadership and mentoring of SERDES development teams. at Cadence Design Systems.
What is Michael Venditti's email address?
AeroLeads has found 1 work email signal at @cadence.com for Michael Venditti at Cadence Design Systems.
Where is Michael Venditti based?
Michael Venditti is based in Montreal, Quebec, Canada while working with Cadence Design Systems.
What companies has Michael Venditti worked for?
Michael Venditti has worked for Cadence Design Systems, Microchip Technology Inc., Pmc-Sierra, Mcgill University, and Bae Systems (Became Teraconnect, Now Defunct).
How can I contact Michael Venditti?
You can use AeroLeads to view verified contact signals for Michael Venditti at Cadence Design Systems, including work email, phone, and LinkedIn data when available.
What schools did Michael Venditti attend?
Michael Venditti holds Ph.D, Electrical Engineering from Mcgill University.
What skills is Michael Venditti known for?
Michael Venditti is listed with skills including Mixed Signal, Ic, Cmos, Asic, Circuit Design, Analog, Integrated Circuit Design, and Simulations.
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