Michael Capone Email & Phone Number

Charlotte, North Carolina, US

- Developing a JavaScript runtime browser extension (React, TypeScript, Vite, Tailwind CSS) that enables the visualization of lazy-loaded components within the Qwik Framework which facilitates the debugging of the new development paradigm- Displayed in real-time HAR logs from Chrome.devtools API via Chart.js to enable developer analysis of TTI performance.

Designing a deployable containerized SaaS financial product (React, Bootstrap, Django, PostgreSQL, Docker, Auth0, Stripe) that dynamically scales via Elastic Beanstalk and AWS RDS as product growth increases

- Managing and operating Red Hat/Ubuntu cloud instances to support validator operations (GCP, AWS, Azure) across multiple Tendermint consensus chains- Architected backup, automation, and deployment scripts to ensure maximal up-time (Python, BASH) at minimal cost

Blacksburg, VA, VA, US

- Led research tasking of EDA tool development to support DoDI Program Protection Plan standards (Quartus, Libero)- Constructed and verified proprietary sensor for in-situ FPGA circuit timing (Verilog, Vivado)- Prototyped multi-component BIST integrated into standard Xilinx Ultrascale+ bootflow (Verilog, Vivado, SDK, Java)- Developed novel FPGA constructs.

Atlanta, Georgia, US

- Researched and prototyped a novel system design method, Hardware Enforcement Guards, that is capable of providing formal guarantees for mission essential function of Cyber-Physical Systems- Designed and implemented FPGA architecture (Verilog) for co-authored paper, “A Hardware-Based Multi-Party Remote Update Protocol for Embedded Systems,” submitted to.

San Jose, CA, US

- Designed PCB (Altium) for proof-of-concept PCIe based DMA hardware module that can be interfaced with current Cisco products- Extended software capabilities of PCI Leech, an attack software suite showcased at DEF CON 24, for Cisco forensics- Evaluated a pre-production FPGA based Secure-Boot implementation slated to be placed in future Cisco.

Arlington, VA, US

- Software Engineering Intern supporting SM-3 hardware in the loop (HWIL) development- Updated existing SM-3's CIL/HIL build scripts (BASH/GNU make) to provide additional requested functionality - Built an analysis tool (BASH) that displayed a visual representation of the system's messaging activity pulled from log files- Devised script (BASH) to automate.

North Canton, Ohio, US

CO-OP Work Term #3 Summer 2014- Developed new testing infrastructure for the prototype ATM that allows field technicians to assess the performance of the module and indicates the first probable cause of failure - Created standalone Windows Presentation Foundation (WPF) programs to optimize work efficiency

North Canton, Ohio, US

CO-OP Work Term #2 Fall 2013- Collaborated on multidisciplinary project to create a reliability test fixture to evaluate the performance of the new prototype cassette design - Updated and redesigned existing IBM Rhapsody project to run on the ARM Cortex-M4 Processor

North Canton, Ohio, US

CO-OP Work Term #1 Spring 2013- Created new functionality into existing WPF/C# projects that interfaced with a family of prototype ATM modules- Diagnosed and troubleshot issues on malfunctioning prototype

Master'S Degree, Electrical And Computer Engineering

Bachelor Of Science - Bs, Computer Engineering

Education record