Michael Capone

Michael Capone Email and Phone Number

Senior Software Engineer @ RVO Health
Michael Capone's Location
Atlanta, Georgia, United States, United States
Michael Capone's Contact Details

Michael Capone work email

Michael Capone personal email

n/a

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About Michael Capone

From accelerating the aging of silicon to architecting robust scalable websites and everything in between, you can count me in! I am a full stack engineer with almost 10 years of experience in the engineering space. My most recent experience is focused around building full stack applications with React, Node.Js, Django, and PostgreSQL on top of scalable cloud infrastructure. Recent open source projects have focused around demystify the Qwik Framework (OverCrank.dev)--super fast web tech that just launched 1.0!When I'm not at my computer you can catch me at one of the many tasty dining establishments in Atlanta or cycling at the gym to burn off all that deliciousness. Other places include local real estate investor meetings around Atlanta!Check me out on Github: https://github.com/Glynz

Michael Capone's Current Company Details
RVO Health

Rvo Health

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Senior Software Engineer
Michael Capone Work Experience Details
  • Rvo Health
    Senior Software Engineer
    Rvo Health Oct 2023 - Present
    Charlotte, North Carolina, Us
  • Overcrank
    Overcrank (Open Source)
    Overcrank Apr 2023 - Oct 2023
    - Developing a JavaScript runtime browser extension (React, TypeScript, Vite, Tailwind CSS) that enables the visualization of lazy-loaded components within the Qwik Framework which facilitates the debugging of the new development paradigm- Displayed in real-time HAR logs from Chrome.devtools API via Chart.js to enable developer analysis of TTI performance- Utilized React, Tailwind CSS, and Material UI to accelerate development of the browser extension for the Qwik 1.0 Launch- Integrated CI/CD via Github Actions to execute Jest test suite and to deploy landing website (Qwik) via Vercel integrations- Converted unstructured community feedback into new features and bug fixes for visualizing loaded components tree
  • Frictionless
    Software Engineer
    Frictionless Jan 2023 - Oct 2023
    Designing a deployable containerized SaaS financial product (React, Bootstrap, Django, PostgreSQL, Docker, Auth0, Stripe) that dynamically scales via Elastic Beanstalk and AWS RDS as product growth increases
  • Power Sink
    Software Engineer
    Power Sink Apr 2021 - Oct 2023
    - Managing and operating Red Hat/Ubuntu cloud instances to support validator operations (GCP, AWS, Azure) across multiple Tendermint consensus chains- Architected backup, automation, and deployment scripts to ensure maximal up-time (Python, BASH) at minimal cost
  • Graf Research
    Research Engineer
    Graf Research Jun 2018 - May 2022
    Blacksburg, Va, Va, Us
    - Led research tasking of EDA tool development to support DoDI Program Protection Plan standards (Quartus, Libero)- Constructed and verified proprietary sensor for in-situ FPGA circuit timing (Verilog, Vivado)- Prototyped multi-component BIST integrated into standard Xilinx Ultrascale+ bootflow (Verilog, Vivado, SDK, Java)- Developed novel FPGA constructs via custom EDA tooling to induce and measure aging effects internal to FPGA and performed extensive analysis on the phenomenon (ISE, Quartus, Python)- Implemented and tested logging format from Python implementation to viable C++ design running on ZCU102 ARM processor (C++, Python, Xilinx SDK)
  • Georgia Tech Research Institute
    Graduate Research Assistant
    Georgia Tech Research Institute May 2016 - May 2018
    Atlanta, Georgia, Us
    - Researched and prototyped a novel system design method, Hardware Enforcement Guards, that is capable of providing formal guarantees for mission essential function of Cyber-Physical Systems- Designed and implemented FPGA architecture (Verilog) for co-authored paper, “A Hardware-Based Multi-Party Remote Update Protocol for Embedded Systems,” submitted to the CODES+ISSS conference at Embedded Systems Weeks, 2017- Launched the first smart city pilot project, a cooperative effort with the city of Atlanta to deploy smart nodes- Architected build scheme and security functionalities (remote firmware & software update, SSL data transmission to backend, anti-tamper mechanism, unique device identification, and secure startup behavior) on a smart cities node
  • Cisco
    Graduate Intern
    Cisco May 2017 - Aug 2017
    San Jose, Ca, Us
    - Designed PCB (Altium) for proof-of-concept PCIe based DMA hardware module that can be interfaced with current Cisco products- Extended software capabilities of PCI Leech, an attack software suite showcased at DEF CON 24, for Cisco forensics- Evaluated a pre-production FPGA based Secure-Boot implementation slated to be placed in future Cisco Routers/Switches
  • Raytheon
    Technical Student - Senior
    Raytheon Jun 2015 - Aug 2015
    Arlington, Va, Us
    - Software Engineering Intern supporting SM-3 hardware in the loop (HWIL) development- Updated existing SM-3's CIL/HIL build scripts (BASH/GNU make) to provide additional requested functionality - Built an analysis tool (BASH) that displayed a visual representation of the system's messaging activity pulled from log files- Devised script (BASH) to automate merger process of multiple HIL/CIL builds - Prototyped and demonstrated Python interface that would be used to replace existing LabWindows CVI toolchain
  • Diebold
    Firmware Engineer - Co-Op
    Diebold May 2014 - Aug 2014
    North Canton, Ohio, Us
    CO-OP Work Term #3 Summer 2014- Developed new testing infrastructure for the prototype ATM that allows field technicians to assess the performance of the module and indicates the first probable cause of failure - Created standalone Windows Presentation Foundation (WPF) programs to optimize work efficiency
  • Diebold
    Firmware Engineer - Co-Op
    Diebold Aug 2013 - Dec 2013
    North Canton, Ohio, Us
    CO-OP Work Term #2 Fall 2013- Collaborated on multidisciplinary project to create a reliability test fixture to evaluate the performance of the new prototype cassette design - Updated and redesigned existing IBM Rhapsody project to run on the ARM Cortex-M4 Processor
  • Diebold
    Firmware Engineer - Co-Op
    Diebold Jan 2013 - May 2013
    North Canton, Ohio, Us
    CO-OP Work Term #1 Spring 2013- Created new functionality into existing WPF/C# projects that interfaced with a family of prototype ATM modules- Diagnosed and troubleshot issues on malfunctioning prototype

Michael Capone Skills

C++ C Vivado Embedded Linux C# Modelsim Github Verilog Python Altium Designer

Michael Capone Education Details

  • Georgia Institute Of Technology
    Georgia Institute Of Technology
    Electrical And Computer Engineering
  • Georgia Institute Of Technology
    Georgia Institute Of Technology
    Computer Engineering
  • Codesmith
    Codesmith

Frequently Asked Questions about Michael Capone

What company does Michael Capone work for?

Michael Capone works for Rvo Health

What is Michael Capone's role at the current company?

Michael Capone's current role is Senior Software Engineer.

What is Michael Capone's email address?

Michael Capone's email address is mi****@****eon.com

What is Michael Capone's direct phone number?

Michael Capone's direct phone number is +141247*****

What schools did Michael Capone attend?

Michael Capone attended Georgia Institute Of Technology, Georgia Institute Of Technology, Codesmith.

What skills is Michael Capone known for?

Michael Capone has skills like C++, C, Vivado, Embedded Linux, C#, Modelsim, Github, Verilog, Python, Altium Designer.

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