Michael Anfang Email & Phone Number

New York, NY, US

Palo Alto, California, US

Contracted with PsiQuantum to build a from-scratch Artix-7 FPGA to facilitate communication for quantum computing controls. Worked to architect and implement a system including multiple SERDES links, register control and access over SPI, chip to chip communication over transceiver links, and parsed message data to send and receive commands.

Founder of Eggslist, a distributed platform to help people find local food.I had the honor of leading a team to bring from concept to market this platform, designing the UX, and serving as CEO and CTO to a team of distributed engineers and designers to bring this passion project to life.Check it out at www.eggslist.com, and send me a message if you want to.

Hatchtrack is bringing hi-tech and IoT to backyard poultry keeping! We are a proud member of the IDEA program at NU, which has awarded us equity-free grants to support our development, and a member of the MassChallenge2020 Boston accelerator!Our app provides a centralized place to managing the egg incubation process, paired with an IoT device that sits in.

Chandler, Arizona, US

FPGA consulting on wireless telecom projects.Rework, debug, and simulation on proprietary IP cores related to radio processing.High speed designs on Intel parts. Multiple simultaneous IQ streams packaged as DIFI, processed through a variety of user-selectable modules.

Vista, California, US

Partnered with Qubitekk for the exciting launch of an industry first - a commercial quantum network, in partnership with EPB in Chattanooa, TN.I work on FPGA designs on Cyclone 10GX and Stratix 10TX systems, designing NIOS software, along with with hardware design reviews and debug to enable Qubitekk to establish its name as a leader in in the quantum.

Continued work with Facebook Reality Labs during COVID19 pandemic, Developing FPGA based prototype solutions for AR/VR applications to enable multiple in-house customers to benefit from a rapid prototyping platform for AR/VR rendering.Implemented complex AXI interconnects, latency-sensitive AR/VR IP for GPU rendering to VR displays, and implemented.

Bothell, WA, US

FPGA design for Tethers Unlimited, Inc., focused on flight ready products for satellite and space applications. Product lines include the SWIFT flight-ready software defined radios and Cobra robotic gimbals.Next up, chickens in space!

Working with a research group to implementing FPGA-based prototyping solutions for next-gen Virtual and Augmented Reality applications.Implemented NOCs, latency-sensitive AR/VR IP for GPU rendering to VR displays, and implemented multiple variants of prototype blocks on predominantly Virtex Ultrascale platforms.

Founder of an FPGA design and consulting company, working on all phases of FPGA design. DSP and IP integration, AXI and custom IP High speed designs with multiple clock domains Testing and Simulation Xilinx and Intel (Altera) Verilog, VHDL, SystemVerilog Consulting on best practices, including reset, clock domain crossing, and timing analysis

Rolling Meadows, Illinois, US

Continued FPGA feature development and improvements on Epiq's lineup of Sidekiq SDRsPorting SDR reference design to custom hardware on Zynq platforms

Rolling Meadows, Illinois, US

Teamed with Epiq bring to market the smallest of modular, custom software defined radios, in mPCIe and M.2 form factors. Epiq had single-digit employees when I joined, and has since scaled to ~50 as they supported clients in telecom and defense.I performed FPGA design and validation on Sidekiq, Matchstiq, Maveriq, and Quadratiq lines of software defined.

Ramsey, New Jersey, US

I joined Model to lead their efforts in improving their techniques and tools to repair automotive electronics. Developed test platforms and tools for automotive electronics - Clusters and GM RadiosCAN, GMLAN, FlexRayReverse engineering modern/legacy vehicle electronicsDeveloped variety of automotive electronic test software with C / WxWidgets, working with.

US

FPGA design and implementation of aviation communication protocols for ramp test sets.Upgraded TS-4850 test set to meet AIMS verification standard for Mode 5 IFF based on a Matlab modelDeveloped and modified SIF, Mode 4, HPI, FPGA/CPLD communication busesImplemented full infrastructure to support FPGA development, including version control and bug tracking.

Plainview, NY, US

Managed system construction and integration of MOCVD systems with customized hardware and software flows for customersDeveloped and customized CAD drawingsManaged software version controlManaged licensing compliance