TCAD simulations for low power device design.

Process and device simulations for CMOS image sensor pixel development and optimization.

Program management of technical education courses and programs for analog process and design engineers. Internal consultant for new engineering programs. Member, SISPAD 2009 Technical Program Committee.

FEOL process integration in Maydan Technology Demo Center down to the 45nm node. Testchip project management. Mask data prep; including design rule checking, dummy fill, OPC interface, mask ordering. Manager of seven-person group, which included the parametric testing lab (E-test).

TCAD simulation for process technology development and manufacturing support of microprocessors from 0.35um to 100nm in Fab25. TCAD assignee at Motorola R&D alliance.

Strategic Technology Process Analysis group. Compared approaches and developed industry-consensus flows for 0.25 to 0.18 um technologies. Results were used for equipment development and cost resource modeling. Heavily involved in the start-up of the new TCAD activity at SEMATECH, including the 2D dopant profiling project.

Senior Applications Engineer at one-man Austin office. Created training program and conducted monthly training sessions. Worldwide customer support for TCAD simulation programs, including SUPREM-3, TSUPREM-4, and PISCES-2B.

- Device/Simulation engineer assigned to SEMATECH consortium during start-up phase, working on 0.5 micron CMOS development. - TCAD Applications Engineer. Training of engineers in the use of TI's TCAD tools and consultant on advanced simulation problems. - DRAM Process Development Engineer, 64K through 1M generations. Transfer to production, both domestic and international.