Developing FPGA based solutions (written in VHDL) for data centres. E.g. inline encryption/decryption at full line rate.I'm responsible for requirement specification, architecture, user documentation, test bench development, module simulation (unit test) and implementation, system level simulation and integration, and back-end development on high-end Xilinx Ultrascale+ FPGAs.

Teaching high school physics

Teaching mathematics, science (physics), and programming (Ruby) at high school level.

Teaching mathematics and science (physics) at high school level.

I worked with FPGA and CPLD firmware (written in VHDL and Verilog), Linux kernel drivers (written in C), and Linux based application software (written in C++).The user management platform is SCOS.I worked with all phases of the project lifecycle (waterfall model), including reviewing requirement specifications, developing test plans, task estimation and schedule, design, implementation, unit test, system test, and customer acceptance test.My responsibilities included:- acting as mentor for junior colleagues- project management- quality assurance, e.g. developing test plans- system architect- manage development tools.

Developed firmware and software for Carrier Ethernet line cards. Two years of experience implementing and maintaining the network protocol MSTP in C++.Two years of experience maintaining the protocols GFP, SDH, and OTN in VHDL.

Developed system for provisioning of broadband connections.Wrote application modules (in C++) for the TeMIP platform with an underlying Oracle database.

Developed driver (in C) for ISDN chipset.Developed IPSec protocol suite (in C++) for VPN. Responsible for managing sub contractor in Ireland.

Lectured a class of 80 students in first-year physics (wave theory) for one year.Analyzed a quantum mechanical model of photosynthesis.