Muhammad Ijaz
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Muhammad Ijaz Email & Phone Number

ASIC RTL Design Engineer @ Barcelona Supercomputing Center | Specializing in RISC-V Architecture and VPU Design at Barcelona Supercomputing Center
Location: Barcelona, Catalonia, Spain 4 work roles 3 schools
1 work email found @bsc.es LinkedIn matched
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Role
ASIC RTL Design Engineer @ Barcelona Supercomputing Center | Specializing in RISC-V Architecture and VPU Design
Location
Barcelona, Catalonia, Spain
Company size

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Muhammad Ijaz is listed as ASIC RTL Design Engineer @ Barcelona Supercomputing Center | Specializing in RISC-V Architecture and VPU Design at Barcelona Supercomputing Center, a company with 630 employees, based in Barcelona, Catalonia, Spain. AeroLeads shows a work email signal at bsc.es and a matched LinkedIn profile for Muhammad Ijaz.

Muhammad Ijaz previously worked as ASIC RTL Design Engineer at Barcelona Supercomputing Center and ASIC RTL Design Engineer at 10Xengineers. Muhammad Ijaz holds Electrical Engineering (Specialization Computer Engineering) from University Of Engineering And Technology, Lahore.

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{first}.{last}@bsc.es
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Profile bio

About Muhammad Ijaz

Experienced RTL Design Engineer with over 3 years specializing in RISC-V architecture and VPU design. Skilled in Verilog and SystemVerilog, with a proven track record in developing high-performance and efficient hardware solutions.Currently focused on advancing open-source hardware projects, with a strong interest in GPU RTL design. Known for delivering robust, scalable designs and thriving in collaborative, innovative environments. Passionate about pushing the boundaries of processor and accelerator technologies to drive the next generation of digital systems.

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Barcelona Supercomputing Center
Barcelona Supercomputing Center
ASIC RTL Design Engineer @ Barcelona Supercomputing Center | Specializing in RISC-V Architecture and VPU Design
barcelona, catalonia, spain
Website
Employees
630
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4 roles

Muhammad Ijaz work experience

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Asic Rtl Design Engineer

Current

Barcelona, Catalonia, Spain

  • 𝗘𝘂𝗿𝗼𝗽𝗲𝗮𝗻 𝗣𝗿𝗼𝗰𝗲𝘀𝘀𝗼𝗿 𝗜𝗻𝗶𝘁𝗶𝗮𝘁𝗶𝘃𝗲 (𝗘𝗣𝗜) & 𝗘𝗨𝗣𝗜𝗟𝗢𝗧 𝗣𝗿𝗼𝗷𝗲𝗰𝘁𝘀:
  • Enhanced RISC-V Vector Processing Unit (VPU): Integrated support for vector tail-agnostic policy, significantly boosting performance for vectorized operations
  • Optimized Mask Unit: Improved efficiency of vector mask instructions by optimizing the mask unit, enhancing overall execution
  • FPGA Collaboration: Worked closely with FPGA teams to optimize synthesis, reduce area, minimize LUT usage, and remove timing bottlenecks, ensuring a highly efficient implementationEPI.
  • Scalar-VPU Interface Refinement: Streamlined the handling of vector memory instructions, leading to notable performance improvements
  • Mask Unit Parameterization: Designed a scalable mask unit with a focus on 16-lane architectures, ensuring flexibility across lane configurations
Jul 2023 - Present

Asic Rtl Design Engineer

Lahore, Punjab, Pakistan

  • Worked on CVA6, a RISC-V application-class core developed at ETH Zurich and maintained by OpenHW Group. Added support for bit-manipulation extensions (Zba, Zbb, Zbc, Zbs)
  • Updated core-v-verif to integrate the latest riscv-arch-test suite, ensuring compliance with updated RISC-V standards
  • Contributed to the development of ARA, a RISC-V vector co-processor for CVA6, adding support for vector mask operations, permutations, and fixed-point arithmetic
  • Optimized load segment instructions for better memory access efficiency in vectorized workloads
  • Collaborated closely with teams from ETH Zurich and OpenHW Group for compliance and performance testing
  • Underwent an intensive and tailored training plan focused on advanced C programming, RISC-V assembly, Digital Logic Design, Verilog, System Verilog, and an in-depth understanding of cache memory types and virtual memory
Oct 2021 - Jun 2023

Intern

Lahore, Punjab, Pakistan

  • Completed a 6-week internship with a primary focus on understanding the working principles of modern water dispensers
  • Gained hands-on experience in the manufacturing processes associated with these dispensing systems
  • Acquired insights into the operational intricacies of state-of-the-art water dispenser technology
Jul 2021 - Aug 2021

Intern

Lahore, Punjab, Pakistan

  • Worked on generating an automated python web-scrapper in order to scrap the courses offered for BS and MS in all the public and private universities of Pakistan which fall under the recognition of Higher Education.
  • Worked on generating the Design Layout of Mobile Application (Andriod and IOS) and Web-Page using Adobe-XD and Adobe Illustrator
Mar 2021 - Jun 2021
Team & coworkers

Colleagues at Barcelona Supercomputing Center

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3 education records

Muhammad Ijaz education

Matric, Science

Government High School Jhang City
FAQ

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What company does Muhammad Ijaz work for?

Muhammad Ijaz works for Barcelona Supercomputing Center.

What is Muhammad Ijaz's role at Barcelona Supercomputing Center?

Muhammad Ijaz is listed as ASIC RTL Design Engineer @ Barcelona Supercomputing Center | Specializing in RISC-V Architecture and VPU Design at Barcelona Supercomputing Center.

What is Muhammad Ijaz's email address?

AeroLeads has found 1 work email signal at @bsc.es for Muhammad Ijaz at Barcelona Supercomputing Center.

Where is Muhammad Ijaz based?

Muhammad Ijaz is based in Barcelona, Catalonia, Spain while working with Barcelona Supercomputing Center.

What companies has Muhammad Ijaz worked for?

Muhammad Ijaz has worked for Barcelona Supercomputing Center, 10Xengineers, Pak Elektron Limited, and Sabz-Qalam.

Who are Muhammad Ijaz's colleagues at Barcelona Supercomputing Center?

Muhammad Ijaz's colleagues at Barcelona Supercomputing Center include Albert Cañellas Solé, Amirpasha Mozaffari, Bàrbara Montserrat, Sergi Girona, and Marc Clascà Ramírez.

How can I contact Muhammad Ijaz?

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What schools did Muhammad Ijaz attend?

Muhammad Ijaz holds Electrical Engineering (Specialization Computer Engineering) from University Of Engineering And Technology, Lahore.

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