Mikael Andersson

Mikael Andersson Email and Phone Number

Retired semiconductor engineer @ Ajeco Oy
Mikael Andersson's Location
Helsinki, Uusimaa, Finland, Finland
Mikael Andersson's Contact Details

Mikael Andersson work email

Mikael Andersson personal email

n/a
About Mikael Andersson

Electronic device modeling professional with wide and long experience:- EM simulation of chip, package and circuit board- Package modeling for RF applications.- Semiconductor & passive component modeling for both baseband & RF applications, as well as both low- and high-power cases. Also experience in power semiconductor modeling.- BSIM, PSP and HiSIM MOS model parameter extraction.- IBIS modeling skills.- Component characterization and specification, measurement methods.- Research project management.Specialties: Extensive knowledge in Agilent IC-CAP & generic SPICE simulator use & model creation. Good skills in Agilent ADS and Cadence Virtuoso tools.

Mikael Andersson's Current Company Details
Ajeco Oy

Ajeco Oy

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Retired semiconductor engineer
Website:
ajeco.fi
Employees:
5
Mikael Andersson Work Experience Details
  • Ajeco Oy
    Documentation Assistant
    Ajeco Oy Dec 2024 - Present
    Helsinki
  • Qualcomm Finland Rffe Oy
    Senior Staff Engineer
    Qualcomm Finland Rffe Oy Oct 2015 - Mar 2024
    Espoo, Finland
    SOI MOSFET modeling, EM simulation, process characterization
  • Silanna Semiconductor
    Staff Modeling Engineer
    Silanna Semiconductor Jan 2015 - Sep 2015
    Turku, Finland
    SOI MOSFET modeling, EM simulation
  • Broadcom Communications Finland Oy
    Senior Principal Scientist, Rf/Wireless
    Broadcom Communications Finland Oy Oct 2013 - Sep 2014
    Helsinki, Finland
    EM simulation and modeling of the multi-band, multi-mode (2G/3G/LTE) cellular RFIC and flip-chip package, as well as simulations and analysis of both test and production circuit boards. Trace modeling by EM simulation and model development from resulting S-parameters. interference and coupling mechanism study on all three levels. Modeling of discrete passive devices like decoupling capacitors, inductors and diplexers. Keeping up to date with MOS modeling field.
  • Renesas Mobile Corporation
    Rfic Senior Device Engineer
    Renesas Mobile Corporation Jan 2012 - Sep 2013
    Helsinki, Finland
    RF PWB, package and chip simulation and modeling. Trace modeling by EM simulation and model development from resulting S-parameters. Crosstalk and coupling mechanism study on all three levels. Modeling of discrete passive devices like decoupling capacitors, inductors and diplexers. Keeping up to date with MOS modeling field.
  • Nokia
    Principal Engineer, Signal Integrity
    Nokia May 2009 - Jan 2012
    Helsinki, Finland
    Signal Integrity support for PWB designers. Specifying and checking IBIS models from outside suppliers, as well as creating own SPICE- or S-parameter based IBIS models. Meetings with component suppliers and EDA vendors. Lecturing on modeling topics both in-house and for suppliers. Maintaining in-house IBIS model and passive device model libraries, the latter for a wide variety of circuit simulators.
  • Nokia
    Senior Specialist, Component Modeling
    Nokia 2006 - May 2009
    Helsinki, Finland
    Specifications and supplier contacts, as well as modeling, for all kinds of passive components, with main responsibility for ferrites and varistors. Meetings with component suppliers, including not only technical, but also component quality, availability and pricing issues. Lecturing on modeling topics both in-house and for suppliers. Maintaining in-house passive device model libraries for a wide variety of circuit simulators.
  • Nokia Research Center
    Principal Scientist
    Nokia Research Center 1995 - 2006
    Helsinki, Finland
    Semiconductor device characterization and modeling, with emphasis on GaAs FET and Si LDMOS devices, but also for all other mobile phone components where suppliers did not offer models. Modeling support for RF designers. Research project management. Started in-house device model library.
  • Vtt Technical Research Centre Of Finland
    Research Engineer
    Vtt Technical Research Centre Of Finland 1985 - 1995
    Espoo, Finland
    Semiconductor device research, with emphasis on device characterization and modeling. GaAs MESFET and Si MOSFET modeling and circuit design, circuit optimization methods development. Supporting device modeling needs of electronics industry through projects and subcontracting.

Mikael Andersson Skills

Rf Signal Integrity Simulations Wireless Semiconductors Ic Pcb Design Electronics Mobile Communications Electromagnetic Simulation Embedded Software Embedded Systems Agilent Ads Asic Circuit Design Digital Signal Processors Wcdma Soc Lte Cellular Communications Hardware Architecture Radio Frequency

Mikael Andersson Education Details

Frequently Asked Questions about Mikael Andersson

What company does Mikael Andersson work for?

Mikael Andersson works for Ajeco Oy

What is Mikael Andersson's role at the current company?

Mikael Andersson's current role is Retired semiconductor engineer.

What is Mikael Andersson's email address?

Mikael Andersson's email address is mi****@****ile.com

What schools did Mikael Andersson attend?

Mikael Andersson attended Teknillinen Korkeakoulu-Tekniska Högskolan, Teknillinen Korkeakoulu-Tekniska Högskolan, Teknillinen Korkeakoulu-Tekniska Högskolan, Sibbo Gymnasium.

What are some of Mikael Andersson's interests?

Mikael Andersson has interest in Computers, Passive Components, Signal Integrity, Computer Games, Sports, Science Fiction, Lecturing, Health, Electronics, Packages.

What skills is Mikael Andersson known for?

Mikael Andersson has skills like Rf, Signal Integrity, Simulations, Wireless, Semiconductors, Ic, Pcb Design, Electronics, Mobile Communications, Electromagnetic Simulation, Embedded Software, Embedded Systems.

Who are Mikael Andersson's colleagues?

Mikael Andersson's colleagues are Dag Nygren, John Holmstrom, Yam Dash, Sam Widlund, Riccardo Luigi Grossi.

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