Mike Parker Email & Phone Number

Broad technical experience of all aspects of VLSI silicon design and implementation from concept to physical validation: RTL (Verilog/VHDL), synthesis, PnR, verification, DfT.Experience of VLSI RAM/CAM design and specialist in ASIC and PCB-level analogue integration issues (noise, EMG, supply integrity etc.). Considerable experience of ASIC packaging and SoC padring specification, design, and implementation.Founder member of ST Bristol SIPRO (Signal Integrity & Product Robustness) Team, a small group of multi-disciplinary engineers tasked with addressing the design quality demands of cutting edge silicon systems. Project management and leadership of a multinational and multidisciplinary ASIC design team.Good working knowledge of scripting languages (Perl(/Tk), AWK, Csh etc.) plus web design languages and tools (JavaScript/Jscript, PHP, HTML, Dreamweaver etc.).Specialties: Excellent working knowledge of:o ANSYS SIwave PCB/substrate SI analysis software o ASIC design and physical verif. toolso signal/supply integrity issues at die, substrate & PCB levelso design and use of analogue simulation and verif. tools (Eldo, Nanosim, HSpice)o design and implementation of leading edge silicon (<65nm) and packaging technologiesAdditional skills/interests: o creation of novel EDA toolso use of distributed/evolutionary computing to analyse SoC-scale phenomena

Listed skills include Soc, Asic, Spice, Eda, and 46 others.