Mikhail Bourgart Email and Phone Number
Mikhail Bourgart work email
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Mikhail Bourgart personal email
more 15 years experience in- Verilog/VHDL design, verification, synthesis, custom design, STA and formal verification;- Synopsys, Cadence and Intel Backend/STA tools;- processor architecture, ARM and DSP cores, various IP, AXI/AHB Buses, Mixed Signal;- writing design documents;- programming design automation tools and flows;- laboratory equipment, tools and technology;creative problem solving, high motivation, good learning skills, great interpersonal skills, mentoring of young engineers.Specialties: Verilog, System Verilog, VHDL, E, System C, Perl, Tcl, Shell-scripting, Assertions, OVM/UVM, Specman; VCS, NCV; LEC, FEV; Primetime, DC, PSpice, RVDS, Code Warrior, Code Composer Studio; C, C++, Matlab, assemblers of ARM and DSP (Freescale and TI);memory interfaces: NOR/NAND FLASH, DDR3/4, LPDDR2/3;W-CDMA, GPS, Wi-Fi, Ethernet, S/HDTV, HD-SDI, TCP/IP;Lotus Notes, GroupWise, Six Sigma, IDEF0
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Design EngineerIntel Corporation Jul 2015 - PresentCustom design/Back-End. Timing/power/area optimization. Formal equivalence verification. Work group state monitoring. Pilot testing of design flow. -
Senior Vlsi Design EngineerAmd Jan 2013 - May 2015HerzliaLow power and multi-clock domain design. Module synthesis, chip level integration, STA. -
Senior Vlsi Design EngineerFreescale Semiconductor Sep 2010 - Dec 2011Design of memory controller for DDR4 and LPDDR3. Low power and multi-clock domain design. Memory PHY design.Verification with OVM/UVM methodology: masters, slaves, monitors, scoreboards. Using of various verification IP. Using E language constraints for Specman driven IP. Beta-testing design tools. A verification plan automation. Functional, code and scenario coverages, assertions, constrained random verification.Features for system integration, multiprocessor & multimastering support… Show more Design of memory controller for DDR4 and LPDDR3. Low power and multi-clock domain design. Memory PHY design.Verification with OVM/UVM methodology: masters, slaves, monitors, scoreboards. Using of various verification IP. Using E language constraints for Specman driven IP. Beta-testing design tools. A verification plan automation. Functional, code and scenario coverages, assertions, constrained random verification.Features for system integration, multiprocessor & multimastering support and quality of service (QoS). Show less -
Verification EngineerElbit Systems Ltd May 2010 - Oct 2010FPGA design verification on ActiveHDL.Verification Video Processing unit. -
Senior Vlsi Design EngineerInomize Mar 2010 - Sep 2010Design and verification hardware modules according customer algorithms. System integration. Consulting and customer support. -
Verification EngineerUnilink System & Software Solution Nov 2009 - Feb 2010Short verification project in the Intel Jerusalem.
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Verification EngineerIntel Nov 2009 - Feb 2010Behavior models building for analog designs. Design verification.
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Senior Vlsi Design EngineerFreescale Semiconductor Israel 2000 - 2009More than 8 chip design projects include for Motorola's Razr V3, Microsoft's ZOON; 4 IP projects: 3G demodulator; PSRAM memory controller; up-sampling filters and control generator for TV decoder; sub-module integration in the Image Processing Unit.Characterization of memory and TV interfaces, PLL.Analogue, mix signal and Matlab simulation.Pre-silicon, board and tester level verification.Backed, focused on design optimisation, with Cadence and Synopsys tools.Script making… Show more More than 8 chip design projects include for Motorola's Razr V3, Microsoft's ZOON; 4 IP projects: 3G demodulator; PSRAM memory controller; up-sampling filters and control generator for TV decoder; sub-module integration in the Image Processing Unit.Characterization of memory and TV interfaces, PLL.Analogue, mix signal and Matlab simulation.Pre-silicon, board and tester level verification.Backed, focused on design optimisation, with Cadence and Synopsys tools.Script making for: Verilog code generation; data path width optimization; IPI sub-module connection; test automation.Share experiences with and mentoring at young engineers.Patent No: WO2007IB50035, WO2007IB051554 Show less
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Senior Vlsi Design EngineerMotorola Semiconductor 2000 - 2004Design components of WCDMA modem. Design and verification memory controller. SoC verification.
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Lan/Man Project LeaderSiberian Bear 1998 - 2000LAN/MAN Project Leader.Microsoft and Compaq Certified Engineer for networking and servers.
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Chief Of Technical DepartmentCommed 1996 - 1998PC desktop and server support,service centre of HP, Viewsonic, APC etc.
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Project ManagerHitsoft 1993 - 1996LAN projects management.
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Design Teem LeaderOmsk Research Institute Of Communications And Electronics 1984 - 1993Development architecture SIMD system on TI DSP and RT application for it.Design architecture of multi-processor systems.Making cross programming system, BIOS kernel, debugger and real time tracer, embedded software for phase antennas array system on TI DSP.Making software and hardware complexes for board and device testing. Linearity improvement in the analogue radio receiving tract.Development architecture, hardware and software of 24 bit VLIW processor.
Mikhail Bourgart Skills
Mikhail Bourgart Education Details
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Omsk State Technical University (Ostu)Radio Technique, Average 98 -
Middle Omsk Schoole 76
Frequently Asked Questions about Mikhail Bourgart
What company does Mikhail Bourgart work for?
Mikhail Bourgart works for Intel Corporation
What is Mikhail Bourgart's role at the current company?
Mikhail Bourgart's current role is Design Engineer at Intel Corporation.
What is Mikhail Bourgart's email address?
Mikhail Bourgart's email address is br****@****int.net
What schools did Mikhail Bourgart attend?
Mikhail Bourgart attended Omsk State Technical University (Ostu), Middle Omsk Schoole 76.
What are some of Mikhail Bourgart's interests?
Mikhail Bourgart has interest in Economic Empowerment, Education, Environment, Design Technics.
What skills is Mikhail Bourgart known for?
Mikhail Bourgart has skills like Verilog, Functional Verification, Systemverilog, Tcl, Fpga, Static Timing Analysis, Rtl Design, Shell Scripting, Arm, Digital Signal Processors, Soc, C.
Who are Mikhail Bourgart's colleagues?
Mikhail Bourgart's colleagues are Valentin Kalashnik, Thu Dang, Samantha G., Geoffrey H., Kavin Vadiveloo, Praveen Raj, Moises Becerra Perez.
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