Verification Engineer
Current- MIPI CSI-2 v4.0 (w/ CD-PHY combo) subsystem-level & SoC-level verification- USB3.2 Gen 1 (Host + Device + DRD) subsystem-level verification- USB2.0 (Host + Device) subsystem-level verification- Develop, integrate VIPs, and maintain UVM testbenches- Perform regression, RTL debugging, and coverage analysis- Familiar with Synopsys VCS, Verdi & Cadence Xcelium